diff options
author | Rafaël Carré <rafael.carre@gmail.com> | 2010-03-25 23:01:56 +0000 |
---|---|---|
committer | Rafaël Carré <rafael.carre@gmail.com> | 2010-03-25 23:01:56 +0000 |
commit | a8d1690ffec4a67fdcb0836fd91989fd1dbf5a7a (patch) | |
tree | ffd2e99e3a61d03641e663c5574ed0adf30d8df0 /firmware/export | |
parent | 43bc2e586ae3194541bc5a835803750fcd2c1c0d (diff) |
Make storage alignement use cache alignement macros
Introduce STORAGE_ALIGN_DOWN, STORAGE_PAD (using new CACHE_PAD) and
STORAGE_OVERLAP (using new CACHE_OVERLAP), make them useful only when
PROC_NEEDS_CACHEALIGN and STORAGE_NEEDS_ALIGN are defined
Modify PP and nano2g system-target.h accordingly
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@25336 a1c6a512-1295-4272-9138-f99709370657
Diffstat (limited to 'firmware/export')
-rw-r--r-- | firmware/export/config.h | 17 | ||||
-rw-r--r-- | firmware/export/config/ipodnano2g.h | 1 | ||||
-rw-r--r-- | firmware/export/system.h | 18 |
3 files changed, 18 insertions, 18 deletions
diff --git a/firmware/export/config.h b/firmware/export/config.h index e678590b44..9d8dc41111 100644 --- a/firmware/export/config.h +++ b/firmware/export/config.h @@ -914,23 +914,6 @@ Lyre prototype 1 */ #endif /* HAVE_USBSTACK */ -/* Storage alignment: the mask specifies a mask of bits which should be - * clear in addresses used for storage_{read,write}_sectors(). This is - * only relevant for buffers that will contain one or more whole sectors. - */ - -/* PP502x DMA requires an alignment of at least 16 bytes */ -#ifdef HAVE_ATA_DMA -#ifdef CPU_PP502x -#define STORAGE_ALIGN_MASK 15 -#endif -#endif /* HAVE_ATA_DMA */ - -/* by default no alignment is required */ -#ifndef STORAGE_ALIGN_MASK -#define STORAGE_ALIGN_MASK 0 -#endif - /* This attribute can be used to enable to detection of plugin file handles leaks. * When enabled, the plugin core will monitor open/close/creat and when the plugin exits * will display an error message if the plugin leaked some file handles */ diff --git a/firmware/export/config/ipodnano2g.h b/firmware/export/config/ipodnano2g.h index 0b690416a7..989d56338d 100644 --- a/firmware/export/config/ipodnano2g.h +++ b/firmware/export/config/ipodnano2g.h @@ -219,6 +219,5 @@ //#define IPOD_ACCESSORY_PROTOCOL //#define HAVE_SERIAL -#define STORAGE_ALIGN_MASK 15 #define USB_WRITE_BUFFER_SIZE (1024*64) diff --git a/firmware/export/system.h b/firmware/export/system.h index 505b167af9..fee188802b 100644 --- a/firmware/export/system.h +++ b/firmware/export/system.h @@ -312,6 +312,16 @@ static inline void cpucache_flush(void) /* Aligns a buffer pointer and size to proper boundaries */ #define CACHEALIGN_BUFFER(start, size) \ ALIGN_BUFFER((start), (size), CACHEALIGN_SIZE) +/* Pad a size so the buffer can be aligned later */ +#define CACHE_PAD(x) ((x) + CACHEALIGN_SIZE - 1) +/* Number of bytes in the last cacheline assuming buffer of size x is aligned */ +#define CACHE_OVERLAP(x) (x & (CACHEALIGN_SIZE - 1)) + +#ifdef NEEDS_STORAGE_ALIGN +#define STORAGE_ALIGN_DOWN(x) CACHEALIGN_DOWN(x) +#define STORAGE_PAD(x) CACHE_PAD(x) +#define STORAGE_OVERLAP(x) CACHE_OVERLAP(x) +#endif #else /* ndef PROC_NEEDS_CACHEALIGN */ @@ -323,9 +333,17 @@ static inline void cpucache_flush(void) #define CACHEALIGN_DOWN(x) (x) /* Make no adjustments */ #define CACHEALIGN_BUFFER(start, size) +#define CACHE_PAD(x) (x) +#define CACHE_OVERLAP(x) 0 #endif /* PROC_NEEDS_CACHEALIGN */ +#if !defined(PROC_NEEDS_CACHEALIGN) || !defined(NEEDS_STORAGE_ALIGN) +#define STORAGE_ALIGN_DOWN(x) (x) +#define STORAGE_PAD(x) (x) +#define STORAGE_OVERLAP(x) 0 +#endif + /* Double-cast to avoid 'dereferencing type-punned pointer will * break strict aliasing rules' B.S. */ #define PUN_PTR(type, p) ((type)(intptr_t)(p)) |