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authorMichael Sparmann <theseven@rockbox.org>2010-06-20 12:23:57 +0000
committerMichael Sparmann <theseven@rockbox.org>2010-06-20 12:23:57 +0000
commit3b97fbd91e532fc5808babfa0960c81941f34696 (patch)
tree3055ac683670ebbfad10ce1b86f881c79d7d35a1 /firmware/export
parent53c799e445f1408eff239dcbf47c03523ec9ea96 (diff)
Add a STORAGE_ALIGN_ATTR macro, similar to CACHEALIGN_ATTR, for consistency
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@26982 a1c6a512-1295-4272-9138-f99709370657
Diffstat (limited to 'firmware/export')
-rw-r--r--firmware/export/system.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/firmware/export/system.h b/firmware/export/system.h
index db4b3650ee..205e4bc058 100644
--- a/firmware/export/system.h
+++ b/firmware/export/system.h
@@ -336,6 +336,7 @@ static inline void cpucache_flush(void)
#endif /* PROC_NEEDS_CACHEALIGN */
#ifdef STORAGE_WANTS_ALIGN
+#define STORAGE_ALIGN_ATTR __attribute__((aligned(CACHEALIGN_SIZE)))
#define STORAGE_ALIGN_DOWN(x) \
((typeof (x))ALIGN_DOWN_P2((uintptr_t)(x), CACHEALIGN_BITS))
/* Pad a size so the buffer can be aligned later */