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authorMaurus Cuelenaere <mcuelenaere@gmail.com>2008-09-14 16:26:08 +0000
committerMaurus Cuelenaere <mcuelenaere@gmail.com>2008-09-14 16:26:08 +0000
commit1e294e3f2518a5dd813a773b23271b12d22eeac4 (patch)
tree9c334b21456cbf5d806dbcfa7b9889bdb4fbaec1 /firmware/export/thread.h
parente3f1a3f33ef2e0a1a5aaf6368fc79b7e4cae0d2b (diff)
Onda VX747:
* Get rid of bug when interrupts are enabled * Get threading to work (although with some weirdness) * Other fixes/optimizations git-svn-id: svn://svn.rockbox.org/rockbox/trunk@18512 a1c6a512-1295-4272-9138-f99709370657
Diffstat (limited to 'firmware/export/thread.h')
-rw-r--r--firmware/export/thread.h8
1 files changed, 4 insertions, 4 deletions
diff --git a/firmware/export/thread.h b/firmware/export/thread.h
index ecba179693..c4dfbf4ed3 100644
--- a/firmware/export/thread.h
+++ b/firmware/export/thread.h
@@ -112,10 +112,10 @@ struct regs
#elif defined(CPU_MIPS)
struct regs
{
- uint32_t r[27]; /* 0-104 - Registers $1, v0-v1, a0-a3, t0-t9, s0-s7, gp, fp */
- uint32_t sp; /* 108 - Stack pointer */
- uint32_t ra; /* 112 - Return address */
- uint32_t start; /* 116 - Thread start address, or NULL when started */
+ uint32_t r[10]; /* 0-36 - Registers s0-s7, gp, fp */
+ uint32_t sp; /* 40 - Stack pointer */
+ uint32_t ra; /* 44 - Return address */
+ uint32_t start; /* 48 - Thread start address, or NULL when started */
};
#endif /* CONFIG_CPU */
#else