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authorJens Arnold <amiconn@rockbox.org>2004-12-01 00:33:18 +0000
committerJens Arnold <amiconn@rockbox.org>2004-12-01 00:33:18 +0000
commit303b4abfc5b6e7f1fd85876a2c644a4661d9dd02 (patch)
treede3df45eca3b504a5975526fb3a09ff187566a8f /firmware/export/sh7034.h
parentbbc593128066d258002bb0a17a09c8dd33c07c46 (diff)
Button driver overhaul: (1) Unified the button driver functions as much as possible (2) Proper #defines for FM recorder button ADC channels (3) Got rid of old port B #defines only valid for recorder (4) button filtering for all models (5) RoLo with ON after panic should now work for FM/V2
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@5472 a1c6a512-1295-4272-9138-f99709370657
Diffstat (limited to 'firmware/export/sh7034.h')
-rw-r--r--firmware/export/sh7034.h15
1 files changed, 3 insertions, 12 deletions
diff --git a/firmware/export/sh7034.h b/firmware/export/sh7034.h
index 90cbb5a0a4..c15ee2a88f 100644
--- a/firmware/export/sh7034.h
+++ b/firmware/export/sh7034.h
@@ -140,7 +140,7 @@
#define RSTCSR_ADDR 0x05FFFFBB
#define SBYCR_ADDR 0x05FFFFBC
-
+
#define PADR_ADDR 0x05FFFFC0
#define PBDR_ADDR 0x05FFFFC2
#define PAIOR_ADDR 0x05FFFFC4
@@ -150,7 +150,7 @@
#define PBCR1_ADDR 0x05FFFFCC
#define PBCR2_ADDR 0x05FFFFCE
#define PCDR_ADDR 0x05FFFFD0
-
+
#define CASCR_ADDR 0x05FFFFEE
/* byte halves of the ports */
@@ -164,15 +164,6 @@
#define PBIORL_ADDR 0x05FFFFC7
-/* Port B data register bits */
-#define PBDR_LCD_SDA 0x0001 /* LCD serial data */
-#define PBDR_LCD_SCK 0x0002 /* LCD serial clock */
-#define PBDR_LCD_DC 0x0004 /* LCD data (1) / command (0) */
-#define PBDR_LCD_CS1 0x0008 /* LCD chip select 1 (active low) */
-#define PBDR_BTN_OFF 0x0010 /* Off button (active low) */
-#define PBDR_LED_RED 0x0040 /* Red LED */
-#define PBDR_BTN_ON 0x0100 /* On button (active low) */
-
/* A/D control/status register bits */
#define ADCSR_CH 0x07 /* Channel/group select */
#define ADCSR_CKS 0x08 /* Clock select */
@@ -195,7 +186,7 @@
#define SMR1 (*((volatile unsigned char*)SMR1_ADDR))
#define BRR1 (*((volatile unsigned char*)BRR1_ADDR))
#define SCR1 (*((volatile unsigned char*)SCR1_ADDR))
-#define TDR1 (*((volatile unsigned char*)TDR1_ADDR))
+#define TDR1 (*((volatile unsigned char*)TDR1_ADDR))
#define SSR1 (*((volatile unsigned char*)SSR1_ADDR))
#define RDR1 (*((volatile unsigned char*)RDR1_ADDR))