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authorMarcin Bukat <marcin.bukat@gmail.com>2011-07-19 06:49:03 +0000
committerMarcin Bukat <marcin.bukat@gmail.com>2011-07-19 06:49:03 +0000
commit5d9b23016852af99d285521f71a23ddea99ae7ee (patch)
tree7177428091eb7224e9805a0f10a8c9effea63969 /firmware/export/rk27xx.h
parentf1c7fba5a474ebdfd1e162459df1a513911da1b7 (diff)
rk27xx - implement cache_commit_discard(). Cache is still not enabled in crt0.S
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@30167 a1c6a512-1295-4272-9138-f99709370657
Diffstat (limited to 'firmware/export/rk27xx.h')
-rw-r--r--firmware/export/rk27xx.h5
1 files changed, 4 insertions, 1 deletions
diff --git a/firmware/export/rk27xx.h b/firmware/export/rk27xx.h
index a5cd396a33..7ada367627 100644
--- a/firmware/export/rk27xx.h
+++ b/firmware/export/rk27xx.h
@@ -7,6 +7,9 @@
#define FLASH_BANK0 0x10000000
#define FLASH_BANK1 0x11000000
+#define USB_NUM_ENDPOINTS 16
+#define USB_DEVBSS_ATTR
+
/* Timers */
#define APB0_TIMER (ARM_BUS0_BASE + 0x00000000)
#define TMR0LR (*(volatile unsigned long *)(APB0_TIMER + 0x00))
@@ -1006,7 +1009,7 @@
#define DMACHEN_CH3 (0x101<<3)
/* ARM7 cache controller */
-#define ARM_CACHE_CNTRL 0xEFFF0000
+#define ARM_CACHE_CTRL 0xEFFF0000
#define DEVID (*(volatile unsigned long *)(ARM_CACHE_CTRL + 0x00))
#define CACHEOP (*(volatile unsigned long *)(ARM_CACHE_CTRL + 0x04))
#define CACHELKDN (*(volatile unsigned long *)(ARM_CACHE_CTRL + 0x08))