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author | Andree Buschmann <AndreeBuschmann@t-online.de> | 2010-11-19 07:17:20 +0000 |
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committer | Andree Buschmann <AndreeBuschmann@t-online.de> | 2010-11-19 07:17:20 +0000 |
commit | 90a5a8a068f63290ffb4b1d1b017dd8d408321b1 (patch) | |
tree | 9b9088d3ae29a87d744ab88be875ce4eb558386b /firmware/export/imx31l.h | |
parent | 1abc5b8ea8ba8112da31726c3c2eef01f53915bf (diff) |
Define CACHEALIGN_BITS for missing ARM CPUs for later use.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@28619 a1c6a512-1295-4272-9138-f99709370657
Diffstat (limited to 'firmware/export/imx31l.h')
-rw-r--r-- | firmware/export/imx31l.h | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/firmware/export/imx31l.h b/firmware/export/imx31l.h index 7cb452d3cb..bf1a05b6ec 100644 --- a/firmware/export/imx31l.h +++ b/firmware/export/imx31l.h @@ -38,7 +38,6 @@ #define FRAME ((void *)(FRAME_PHYS_ADDR+0x100000-CSD0_BASE_ADDR)) #define CACHEALIGN_BITS 5 -#define CACHEALIGN_SIZE 32 #define NOCACHE_BASE CSD0_BASE_ADDR /* USBOTG */ |