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authorLinus Nielsen Feltzing <linus@haxx.se>2005-03-18 11:34:26 +0000
committerLinus Nielsen Feltzing <linus@haxx.se>2005-03-18 11:34:26 +0000
commita3176e4d828e335b16c60948fea10ba0b078057e (patch)
treeddf4aed86c15dfa796e4a172b9438c023c1336bd /firmware/export/i2c-h100.h
parent752d0bb8be47b8c2b67c7b1a3bbf2a70fd582e92 (diff)
iRiver I2C driver by Andy Young
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@6203 a1c6a512-1295-4272-9138-f99709370657
Diffstat (limited to 'firmware/export/i2c-h100.h')
-rw-r--r--firmware/export/i2c-h100.h64
1 files changed, 64 insertions, 0 deletions
diff --git a/firmware/export/i2c-h100.h b/firmware/export/i2c-h100.h
new file mode 100644
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+++ b/firmware/export/i2c-h100.h
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+/***************************************************************************
+ * __________ __ ___.
+ * Open \______ \ ____ ____ | | _\_ |__ _______ ___
+ * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
+ * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
+ * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
+ * \/ \/ \/ \/ \/
+ * $Id$
+ *
+ * Copyright (C) 2002 by Linus Nielsen Feltzing
+ *
+ * All files in this archive are subject to the GNU General Public License.
+ * See the file COPYING in the source tree root for full license agreement.
+ *
+ * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
+ * KIND, either express or implied.
+ *
+ ****************************************************************************/
+
+/*
+ * Driver for MCF5249's I2C interface
+ * 2005-02-17 hubble@mochine.com
+ *
+ */
+
+#ifndef _I2C_H100_H
+#define _I2C_H100_H
+
+void i2c_init(void);
+int i2c_write(int device, unsigned char *buf, int count);
+void i2c_close(void);
+
+
+#define MAX_LOOP 0x10000 /* TODO: select a better value */
+
+/* PLLCR control */
+#define QSPISEL (1 << 11) /* Selects QSPI or I2C interface */
+
+/* Offsets to I2C registers from base address */
+#define O_MADR 0x00 /* Slave Address */
+#define O_MFDR 0x04 /* Frequency divider */
+#define O_MBCR 0x08 /* Control register */
+#define O_MBSR 0x0c /* Status register */
+#define O_MBDR 0x10 /* Data register */
+
+/* MBSR - Status register */
+#define ICF (1 << 7) /* Transfer Complete */
+#define IAAS (1 << 6) /* Addressed As Alave */
+#define IBB (1 << 5) /* Bus Busy */
+#define IAL (1 << 4) /* Arbitration Lost */
+#define SRW (1 << 2) /* Slave R/W */
+#define IFF (1 << 1) /* I2C Interrupt */
+#define RXAK (1 << 0) /* No Ack bit */
+
+/* MBCR - Control register */
+#define IEN (1 << 7) /* I2C Enable */
+#define IIEN (1 << 6) /* Interrupt Enable */
+#define MSTA (1 << 5) /* Master/Slave select */
+#define MTX (1 << 4) /* Transmit/Receive */
+#define TXAK (1 << 3) /* Transfer ACK */
+#define RSTA (1 << 2) /* Restart.. */
+
+
+#endif