diff options
author | Marcoen Hirschberg <marcoen@gmail.com> | 2005-06-14 00:15:16 +0000 |
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committer | Marcoen Hirschberg <marcoen@gmail.com> | 2005-06-14 00:15:16 +0000 |
commit | 37f59a0f6f824d1b92a0d7893982660cb0cf1f6f (patch) | |
tree | f8fd5399a571bd08c97dfec36dad2f767e0c3023 /firmware/drivers/uda1380.c | |
parent | 24394b3316aa52cb91d52b304552ee0a54b565c5 (diff) |
- add Andy Young's patch to make sound init more quiet
- add myself to the credits at the spot of my first commit
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@6704 a1c6a512-1295-4272-9138-f99709370657
Diffstat (limited to 'firmware/drivers/uda1380.c')
-rw-r--r-- | firmware/drivers/uda1380.c | 19 |
1 files changed, 16 insertions, 3 deletions
diff --git a/firmware/drivers/uda1380.c b/firmware/drivers/uda1380.c index 67f8a6dc10..67479fd92e 100644 --- a/firmware/drivers/uda1380.c +++ b/firmware/drivers/uda1380.c @@ -47,12 +47,12 @@ unsigned short uda1380_defaults[2*NUM_DEFAULT_REGS] = { REG_0, EN_DAC | EN_INT | EN_DEC | SYSCLK_256FS | WSPLL_25_50, REG_I2S, I2S_IFMT_IIS, - REG_PWR, PON_PLL | PON_HP | PON_DAC | EN_AVC | PON_AVC | PON_BIAS, + REG_PWR, PON_PLL | PON_DAC | PON_BIAS, /* PON_HP is enabled later */ REG_AMIX, AMIX_RIGHT(0x10) | AMIX_LEFT(0x10), /* 00=max, 3f=mute */ REG_MASTER_VOL, MASTER_VOL_LEFT(0x20) | MASTER_VOL_RIGHT(0x20), /* 00=max, ff=mute */ REG_MIX_VOL, MIX_VOL_CHANNEL_1(0) | MIX_VOL_CHANNEL_2(0xff), /* 00=max, ff=mute */ REG_EQ, 0, - REG_MUTE, MUTE_CH2, /* Mute channel 2 (digital decimation filter) */ + REG_MUTE, MUTE_MASTER, /* Mute everything to start with */ REG_MIX_CTL, 0, REG_DEC_VOL, 0, REG_PGA, MUTE_ADC, @@ -134,12 +134,25 @@ int uda1380_init(void) if (uda1380_set_regs() == -1) return -1; + /* Sleep a while, then power on headphone amp */ + sleep(HZ/8); + uda1380_write_reg(REG_PWR, uda1380_regs[REG_PWR] | PON_HP); + + /* Sleep a little more, then disable the master mute */ + sleep(HZ/8); + uda1380_write_reg(REG_MUTE, MUTE_CH2); + return 0; } /* Nice shutdown of UDA1380 codec */ void uda1380_close(void) { - uda1380_write_reg(REG_PWR, 0); /* Disable power */ + /* First enable mute and sleep a while */ + uda1380_write_reg(REG_MUTE, MUTE_MASTER); + sleep(HZ/8); + + /* Then power off the rest of the chip */ + uda1380_write_reg(REG_PWR, 0); uda1380_write_reg(REG_0, 0); /* Disable codec */ } |