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authorMichael Sparmann <theseven@rockbox.org>2009-11-25 19:15:19 +0000
committerMichael Sparmann <theseven@rockbox.org>2009-11-25 19:15:19 +0000
commitf788e8feffedc056ded4b2d8134e9805dc2caab2 (patch)
tree203ca93a842614f83265661b81090f0a763ab208
parent84f04a57eee2480100ab533b97665fec7f1da83f (diff)
Fix the S5L8701 µsec timer
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@23747 a1c6a512-1295-4272-9138-f99709370657
-rw-r--r--firmware/export/s5l8700.h6
1 files changed, 3 insertions, 3 deletions
diff --git a/firmware/export/s5l8700.h b/firmware/export/s5l8700.h
index a8341137ee..94b0c4e703 100644
--- a/firmware/export/s5l8700.h
+++ b/firmware/export/s5l8700.h
@@ -310,9 +310,9 @@
#define TDDATA1 (*(REG32_PTR_T)(0x3C70006C)) /* Data1 Register */
#define TDPRE (*(REG32_PTR_T)(0x3C700070)) /* Pre-scale register */
#define TDCNT (*(REG32_PTR_T)(0x3C700074)) /* Counter register */
-#define FIVE_USEC_TIMER (((*(REG32_PTR_T)(0x3C700080)) << 32) \
- | (*(REG32_PTR_T)(0x3C700084))) /* 64bit 5usec timer */
-#define USEC_TIMER ((*(REG32_PTR_T)(0x3C700084)) * 5) /* lower 32 bits of the above as a usec timer */
+#define FIVE_USEC_TIMER (((uint64_t)(*(REG32_PTR_T)(0x3C700080)) << 32) \
+ | (*(REG32_PTR_T)(0x3C700084))) /* 64bit 5usec timer */
+#define USEC_TIMER FIVE_USEC_TIMER * 5 /* usecs */
/* 12. NAND FLASH CONTROLER */
#if CONFIG_CPU==S5L8701