imx233: rewrite ocotp using new register headers

Change-Id: I3c622119a1e296ec6b3f35f27e81b5118ab7f6cc

3 files changed, 22 insertions, 43 deletions

diff --git a/firmware/target/arm/imx233/debug-imx233.c b/firmware/target/arm/imx233/debug-imx233.c
index 292cb2e9e2..10f951c2e1 100644
--- a/firmware/target/arm/imx233/debug-imx233.c
+++ b/firmware/target/arm/imx233/debug-imx233.c
@@ -557,20 +557,20 @@ struct
 } dbg_ocotp[] =
 {
 #define E(n,v) { .name = n, .addr = &v }
-    E("CUST0", HW_OCOTP_CUSTx(0)), E("CUST1", HW_OCOTP_CUSTx(1)),
-    E("CUST2", HW_OCOTP_CUSTx(2)), E("CUST0", HW_OCOTP_CUSTx(3)),
-    E("HWCAP0", HW_OCOTP_HWCAPx(0)), E("HWCAP1", HW_OCOTP_HWCAPx(1)),
-    E("HWCAP2", HW_OCOTP_HWCAPx(2)), E("HWCAP3", HW_OCOTP_HWCAPx(3)),
-    E("HWCAP4", HW_OCOTP_HWCAPx(4)), E("HWCAP5", HW_OCOTP_HWCAPx(5)),
+    E("CUST0", HW_OCOTP_CUSTn(0)), E("CUST1", HW_OCOTP_CUSTn(1)),
+    E("CUST2", HW_OCOTP_CUSTn(2)), E("CUST0", HW_OCOTP_CUSTn(3)),
+    E("HWCAP0", HW_OCOTP_HWCAPn(0)), E("HWCAP1", HW_OCOTP_HWCAPn(1)),
+    E("HWCAP2", HW_OCOTP_HWCAPn(2)), E("HWCAP3", HW_OCOTP_HWCAPn(3)),
+    E("HWCAP4", HW_OCOTP_HWCAPn(4)), E("HWCAP5", HW_OCOTP_HWCAPn(5)),
     E("SWCAP", HW_OCOTP_SWCAP), E("CUSTCAP", HW_OCOTP_CUSTCAP),
-    E("OPS0", HW_OCOTP_OPSx(0)), E("OPS1", HW_OCOTP_OPSx(1)),
-    E("OPS2", HW_OCOTP_OPSx(2)), E("OPS2", HW_OCOTP_OPSx(3)),
-    E("UN0", HW_OCOTP_UNx(0)), E("UN1", HW_OCOTP_UNx(1)),
-    E("UN2", HW_OCOTP_UNx(2)),
-    E("ROM0", HW_OCOTP_ROMx(0)), E("ROM1", HW_OCOTP_ROMx(1)),
-    E("ROM2", HW_OCOTP_ROMx(2)), E("ROM3", HW_OCOTP_ROMx(3)),
-    E("ROM4", HW_OCOTP_ROMx(4)), E("ROM5", HW_OCOTP_ROMx(5)),
-    E("ROM6", HW_OCOTP_ROMx(6)), E("ROM7", HW_OCOTP_ROMx(7)),
+    E("OPS0", HW_OCOTP_OPSn(0)), E("OPS1", HW_OCOTP_OPSn(1)),
+    E("OPS2", HW_OCOTP_OPSn(2)), E("OPS2", HW_OCOTP_OPSn(3)),
+    E("UN0", HW_OCOTP_UNn(0)), E("UN1", HW_OCOTP_UNn(1)),
+    E("UN2", HW_OCOTP_UNn(2)),
+    E("ROM0", HW_OCOTP_ROMn(0)), E("ROM1", HW_OCOTP_ROMn(1)),
+    E("ROM2", HW_OCOTP_ROMn(2)), E("ROM3", HW_OCOTP_ROMn(3)),
+    E("ROM4", HW_OCOTP_ROMn(4)), E("ROM5", HW_OCOTP_ROMn(5)),
+    E("ROM6", HW_OCOTP_ROMn(6)), E("ROM7", HW_OCOTP_ROMn(7)),
 };
 
 bool dbg_hw_info_ocotp(void)
diff --git a/firmware/target/arm/imx233/ocotp-imx233.h b/firmware/target/arm/imx233/ocotp-imx233.h
index 476ed1f73c..9406f98530 100644
--- a/firmware/target/arm/imx233/ocotp-imx233.h
+++ b/firmware/target/arm/imx233/ocotp-imx233.h
@@ -24,28 +24,7 @@
 #include "config.h"
 #include "system.h"
 
-#define HW_OCOTP_BASE           0x8002c000
-
-#define HW_OCOTP_CTRL           (*(volatile uint32_t *)(HW_OCOTP_BASE + 0x0))
-#define HW_OCOTP_CTRL__RD_BANK_OPEN (1 << 12)
-#define HW_OCOTP_CTRL__ERROR        (1 << 9)
-#define HW_OCOTP_CTRL__BUSY         (1 << 8)
-
-#define HW_OCOTP_CUSTx(x)       (*(volatile uint32_t *)(HW_OCOTP_BASE + 0x20 + 0x10 * (x)))
-
-#define HW_OCOTP_CRYPTOx(x)     (*(volatile uint32_t *)(HW_OCOTP_BASE + 0x60 + 0x10 * (x)))
-
-#define HW_OCOTP_HWCAPx(x)      (*(volatile uint32_t *)(HW_OCOTP_BASE + 0xa0 + 0x10 * (x)))
-
-#define HW_OCOTP_SWCAP          (*(volatile uint32_t *)(HW_OCOTP_BASE + 0x100))
-
-#define HW_OCOTP_CUSTCAP        (*(volatile uint32_t *)(HW_OCOTP_BASE + 0x110))
-
-#define HW_OCOTP_OPSx(x)        (*(volatile uint32_t *)(HW_OCOTP_BASE + 0x130 + 0x10 * (x)))
-
-#define HW_OCOTP_UNx(x)         (*(volatile uint32_t *)(HW_OCOTP_BASE + 0x170 + 0x10 * (x)))
-
-#define HW_OCOTP_ROMx(x)        (*(volatile uint32_t *)(HW_OCOTP_BASE + 0x1a0 + 0x10 * (x)))
+#include "regs/regs-ocotp.h"
 
 #define IMX233_NUM_OCOTP_CUST   4
 #define IMX233_NUM_OCOTP_CRYPTO 4
@@ -54,19 +33,19 @@
 #define IMX233_NUM_OCOTP_UN     3
 #define IMX233_NUM_OCOTP_ROM    8
 
-static void imx233_ocotp_open_banks(bool open)
+static inline void imx233_ocotp_open_banks(bool open)
 {
     if(open)
     {
-        __REG_CLR(HW_OCOTP_CTRL) = HW_OCOTP_CTRL__ERROR;
-        __REG_SET(HW_OCOTP_CTRL) = HW_OCOTP_CTRL__RD_BANK_OPEN;
-        while(HW_OCOTP_CTRL & HW_OCOTP_CTRL__BUSY);
+        BF_CLR(OCOTP_CTRL, ERROR);
+        BF_SET(OCOTP_CTRL, RD_BANK_OPEN);
+        while(BF_RD(OCOTP_CTRL, BUSY));
     }
     else
-        __REG_CLR(HW_OCOTP_CTRL) = HW_OCOTP_CTRL__RD_BANK_OPEN;
+        BF_CLR(OCOTP_CTRL, RD_BANK_OPEN);
 }
 
-static uint32_t imx233_ocotp_read(volatile uint32_t *reg)
+static inline uint32_t imx233_ocotp_read(volatile uint32_t *reg)
 {
     imx233_ocotp_open_banks(true);
     uint32_t val = *reg;
@@ -74,4 +53,4 @@ static uint32_t imx233_ocotp_read(volatile uint32_t *reg)
     return val;
 }
 
-#endif /* OCOTP_IMX233_H */
+#endif /* OCOTP_IMX233_H */
\ No newline at end of file
diff --git a/firmware/usbstack/usb_core.c b/firmware/usbstack/usb_core.c
index 2a3cc1c525..dbc9367dfb 100644
--- a/firmware/usbstack/usb_core.c
+++ b/firmware/usbstack/usb_core.c
@@ -338,7 +338,7 @@ static void set_serial_descriptor(void)
 {
     short* p = &usb_string_iSerial.wString[1];
     for(int i = 0; i < IMX233_NUM_OCOTP_OPS; i++) {
-        uint32_t ops = imx233_ocotp_read(&HW_OCOTP_OPSx(i));
+        uint32_t ops = imx233_ocotp_read(&HW_OCOTP_OPSn(i));
         for(int j = 0; j < 8; j++) {
             *p++ = hex[(ops >> 28) & 0xF];
             ops <<= 4;