diff options
| author | Jens Arnold <amiconn@rockbox.org> | 2004-10-12 09:09:16 +0000 |
|---|---|---|
| committer | Jens Arnold <amiconn@rockbox.org> | 2004-10-12 09:09:16 +0000 |
| commit | 4690ddd87a9baa1fc87d02cc42db6139d94b8356 (patch) | |
| tree | e2dc280562fc1aa834850712a18e3bb6cdfb668a | |
| parent | ae815a0272311ac200d55a6a323b4a0a94f36124 (diff) | |
Bus controller inits are valid for all models. Corrected WCR1 init according to the datasheet (dontcare bits shall be written as 1)
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@5256 a1c6a512-1295-4272-9138-f99709370657
| -rw-r--r-- | firmware/system.c | 8 |
1 files changed, 2 insertions, 6 deletions
diff --git a/firmware/system.c b/firmware/system.c index 16bea107d6..70424c07a8 100644 --- a/firmware/system.c +++ b/firmware/system.c @@ -492,13 +492,9 @@ void system_init(void) BCR |= 0x2000; /* Bus state controller initializations. These are only necessary when - running from flash. The correct settings for player models are not - verified, so we only do this for the recorder and for the Ondio. */ -#if defined(HAVE_RECORDING) || defined(HAVE_MMC) - WCR1 = 0x4000; /* Long wait states for CS6 (ATA), short for the rest. */ + running from flash. */ + WCR1 = 0x40FD; /* Long wait states for CS6 (ATA), short for the rest. */ WCR3 = 0x8000; /* WAIT is pulled up, 1 state inserted for CS6 */ -#endif - } /* Utilize the user break controller to catch invalid memory accesses. */ |