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/* SPDX-License-Identifier: GPL-2.0-or-later */
/* Copyright (C) 2021 ROHM Semiconductors */
#ifndef __LINUX_MFD_BD957X_H__
#define __LINUX_MFD_BD957X_H__
enum {
BD957X_VD50,
BD957X_VD18,
BD957X_VDDDR,
BD957X_VD10,
BD957X_VOUTL1,
BD957X_VOUTS1,
};
#define BD957X_REG_SMRB_ASSERT 0x15
#define BD957X_REG_PMIC_INTERNAL_STAT 0x20
#define BD957X_REG_INT_THERM_STAT 0x23
#define BD957X_REG_INT_THERM_MASK 0x24
#define BD957X_REG_INT_OVP_STAT 0x25
#define BD957X_REG_INT_SCP_STAT 0x26
#define BD957X_REG_INT_OCP_STAT 0x27
#define BD957X_REG_INT_OVD_STAT 0x28
#define BD957X_REG_INT_UVD_STAT 0x29
#define BD957X_REG_INT_UVP_STAT 0x2a
#define BD957X_REG_INT_SYS_STAT 0x2b
#define BD957X_REG_INT_SYS_MASK 0x2c
#define BD957X_REG_INT_MAIN_STAT 0x30
#define BD957X_REG_INT_MAIN_MASK 0x31
#define BD957X_REG_WDT_CONF 0x16
#define BD957X_REG_POW_TRIGGER1 0x41
#define BD957X_REG_POW_TRIGGER2 0x42
#define BD957X_REG_POW_TRIGGER3 0x43
#define BD957X_REG_POW_TRIGGER4 0x44
#define BD957X_REG_POW_TRIGGERL1 0x45
#define BD957X_REG_POW_TRIGGERS1 0x46
#define BD957X_REGULATOR_EN_MASK 0xff
#define BD957X_REGULATOR_DIS_VAL 0xff
#define BD957X_VSEL_REG_MASK 0xff
#define BD957X_MASK_VOUT1_TUNE 0x87
#define BD957X_MASK_VOUT2_TUNE 0x87
#define BD957X_MASK_VOUT3_TUNE 0x1f
#define BD957X_MASK_VOUT4_TUNE 0x1f
#define BD957X_MASK_VOUTL1_TUNE 0x87
#define BD957X_REG_VOUT1_TUNE 0x50
#define BD957X_REG_VOUT2_TUNE 0x53
#define BD957X_REG_VOUT3_TUNE 0x56
#define BD957X_REG_VOUT4_TUNE 0x59
#define BD957X_REG_VOUTL1_TUNE 0x5c
#define BD957X_MAX_REGISTER 0x61
#endif
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