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/*
* Copyright (C) 2005 MIPS Technologies, Inc. All rights reserved.
*
* This program is free software; you can distribute it and/or modify it
* under the terms of the GNU General Public License (Version 2) as
* published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
* for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
*/
#ifndef _MIPS_SIMINT_H
#define _MIPS_SIMINT_H
#define SIM_INT_BASE 0
#define MIPSCPU_INT_MB0 2
#define MIPSCPU_INT_BASE 16
#define MIPS_CPU_TIMER_IRQ 7
#define MIPSCPU_INT_CPUCTR 7
#define MSC01E_INT_BASE 64
#define MIPSCPU_INT_CPUCTR 7
#define MSC01E_INT_CPUCTR 11
#endif
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