summaryrefslogtreecommitdiff
path: root/drivers/video/exynos/s6e8ax0.c
blob: ca2602413aa43a0b0dcda6a47ce4e6e57fc574e7 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
513
514
515
516
517
518
519
520
521
522
523
524
525
526
527
528
529
530
531
532
533
534
535
536
537
538
539
540
541
542
543
544
545
546
547
548
549
550
551
552
553
554
555
556
557
558
559
560
561
562
563
564
565
566
567
568
569
570
571
572
573
574
575
576
577
578
579
580
581
582
583
584
585
586
587
588
589
590
591
592
593
594
595
596
597
598
599
600
601
602
603
604
605
606
607
608
609
610
611
612
613
614
615
616
617
618
619
620
621
622
623
624
625
626
627
628
629
630
631
632
633
634
635
636
637
638
639
640
641
642
643
644
645
646
647
648
649
650
651
652
653
654
655
656
657
658
659
660
661
662
663
664
665
666
667
668
669
670
671
672
673
674
675
676
677
678
679
680
681
682
683
684
685
686
687
688
689
690
691
692
693
694
695
696
697
698
699
700
701
702
703
704
705
706
707
708
709
710
711
712
713
714
715
716
717
718
719
720
721
722
723
724
725
726
727
728
729
730
731
732
733
734
735
736
737
738
739
740
741
742
743
744
745
746
747
748
749
750
751
752
753
754
755
756
757
758
759
760
761
762
763
764
765
766
767
768
769
770
771
772
773
774
775
776
777
778
779
780
781
782
783
784
785
786
787
788
789
790
791
792
793
794
795
796
797
798
799
800
801
802
803
804
805
806
807
808
809
810
811
812
813
814
815
816
817
818
819
820
821
822
823
824
825
826
827
828
829
830
831
832
833
834
835
836
837
838
839
840
841
842
843
844
845
846
847
848
849
850
851
852
853
854
855
856
857
858
859
860
861
862
863
864
865
866
867
868
869
870
871
872
873
874
875
876
877
878
879
880
881
882
883
884
885
886
887
888
889
890
891
892
893
894
895
896
897
898
899
900
901
902
903
/* linux/drivers/video/exynos/s6e8ax0.c
 *
 * MIPI-DSI based s6e8ax0 AMOLED lcd 4.65 inch panel driver.
 *
 * Inki Dae, <inki.dae@samsung.com>
 * Donghwa Lee, <dh09.lee@samsung.com>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
*/

#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/errno.h>
#include <linux/mutex.h>
#include <linux/wait.h>
#include <linux/ctype.h>
#include <linux/io.h>
#include <linux/delay.h>
#include <linux/irq.h>
#include <linux/interrupt.h>
#include <linux/lcd.h>
#include <linux/fb.h>
#include <linux/backlight.h>
#include <linux/regulator/consumer.h>

#include <video/mipi_display.h>
#include <video/exynos_mipi_dsim.h>

#define LDI_MTP_LENGTH		24
#define DSIM_PM_STABLE_TIME	10
#define MIN_BRIGHTNESS		0
#define MAX_BRIGHTNESS		24
#define GAMMA_TABLE_COUNT	26

#define POWER_IS_ON(pwr)	((pwr) == FB_BLANK_UNBLANK)
#define POWER_IS_OFF(pwr)	((pwr) == FB_BLANK_POWERDOWN)
#define POWER_IS_NRM(pwr)	((pwr) == FB_BLANK_NORMAL)

#define lcd_to_master(a)	(a->dsim_dev->master)
#define lcd_to_master_ops(a)	((lcd_to_master(a))->master_ops)

enum {
	DSIM_NONE_STATE = 0,
	DSIM_RESUME_COMPLETE = 1,
	DSIM_FRAME_DONE = 2,
};

struct s6e8ax0 {
	struct device	*dev;
	unsigned int			power;
	unsigned int			id;
	unsigned int			gamma;
	unsigned int			acl_enable;
	unsigned int			cur_acl;

	struct lcd_device	*ld;
	struct backlight_device	*bd;

	struct mipi_dsim_lcd_device	*dsim_dev;
	struct lcd_platform_data	*ddi_pd;
	struct mutex			lock;
	bool  enabled;
};


static struct regulator_bulk_data supplies[] = {
	{ .supply = "vdd3", },
	{ .supply = "vci", },
};

static void s6e8ax0_regulator_enable(struct s6e8ax0 *lcd)
{
	int ret = 0;
	struct lcd_platform_data *pd = NULL;

	pd = lcd->ddi_pd;
	mutex_lock(&lcd->lock);
	if (!lcd->enabled) {
		ret = regulator_bulk_enable(ARRAY_SIZE(supplies), supplies);
		if (ret)
			goto out;

		lcd->enabled = true;
	}
	msleep(pd->power_on_delay);
out:
	mutex_unlock(&lcd->lock);
}

static void s6e8ax0_regulator_disable(struct s6e8ax0 *lcd)
{
	int ret = 0;

	mutex_lock(&lcd->lock);
	if (lcd->enabled) {
		ret = regulator_bulk_disable(ARRAY_SIZE(supplies), supplies);
		if (ret)
			goto out;

		lcd->enabled = false;
	}
out:
	mutex_unlock(&lcd->lock);
}

static const unsigned char s6e8ax0_22_gamma_30[] = {
	0xfa, 0x01, 0x60, 0x10, 0x60, 0xf5, 0x00, 0xff, 0xad, 0xaf,
	0xbA, 0xc3, 0xd8, 0xc5, 0x9f, 0xc6, 0x9e, 0xc1, 0xdc, 0xc0,
	0x00, 0x61, 0x00, 0x5a, 0x00, 0x74,
};

static const unsigned char s6e8ax0_22_gamma_50[] = {
	0xfa, 0x01, 0x60, 0x10, 0x60, 0xe8, 0x1f, 0xf7, 0xad, 0xc0,
	0xb5, 0xc4, 0xdc, 0xc4, 0x9e, 0xc6, 0x9c, 0xbb, 0xd8, 0xbb,
	0x00, 0x70, 0x00, 0x68, 0x00, 0x86,
};

static const unsigned char s6e8ax0_22_gamma_60[] = {
	0xfa, 0x01, 0x60, 0x10, 0x60, 0xde, 0x1f, 0xef, 0xad, 0xc4,
	0xb3, 0xc3, 0xdd, 0xc4, 0x9e, 0xc6, 0x9c, 0xbc, 0xd6, 0xba,
	0x00, 0x75, 0x00, 0x6e, 0x00, 0x8d,
};

static const unsigned char s6e8ax0_22_gamma_70[] = {
	0xfa, 0x01, 0x60, 0x10, 0x60, 0xd8, 0x1f, 0xe7, 0xaf, 0xc8,
	0xb4, 0xc4, 0xdd, 0xc3, 0x9d, 0xc6, 0x9c, 0xbb, 0xd6, 0xb9,
	0x00, 0x7a, 0x00, 0x72, 0x00, 0x93,
};

static const unsigned char s6e8ax0_22_gamma_80[] = {
	0xfa, 0x01, 0x60, 0x10, 0x60, 0xc9, 0x1f, 0xde, 0xae, 0xc9,
	0xb1, 0xc3, 0xdd, 0xc2, 0x9d, 0xc5, 0x9b, 0xbc, 0xd6, 0xbb,
	0x00, 0x7f, 0x00, 0x77, 0x00, 0x99,
};

static const unsigned char s6e8ax0_22_gamma_90[] = {
	0xfa, 0x01, 0x60, 0x10, 0x60, 0xc7, 0x1f, 0xd9, 0xb0, 0xcc,
	0xb2, 0xc3, 0xdc, 0xc1, 0x9c, 0xc6, 0x9c, 0xbc, 0xd4, 0xb9,
	0x00, 0x83, 0x00, 0x7b, 0x00, 0x9e,
};

static const unsigned char s6e8ax0_22_gamma_100[] = {
	0xfa, 0x01, 0x60, 0x10, 0x60, 0xbd, 0x80, 0xcd, 0xba, 0xce,
	0xb3, 0xc4, 0xde, 0xc3, 0x9c, 0xc4, 0x9, 0xb8, 0xd3, 0xb6,
	0x00, 0x88, 0x00, 0x80, 0x00, 0xa5,
};

static const unsigned char s6e8ax0_22_gamma_120[] = {
	0xfa, 0x01, 0x60, 0x10, 0x60, 0xb9, 0x95, 0xc8, 0xb1, 0xcf,
	0xb2, 0xc6, 0xdf, 0xc5, 0x9b, 0xc3, 0x99, 0xb6, 0xd2, 0xb6,
	0x00, 0x8f, 0x00, 0x86, 0x00, 0xac,
};

static const unsigned char s6e8ax0_22_gamma_130[] = {
	0xfa, 0x01, 0x60, 0x10, 0x60, 0xb7, 0xa0, 0xc7, 0xb1, 0xd0,
	0xb2, 0xc4, 0xdd, 0xc3, 0x9a, 0xc3, 0x98, 0xb6, 0xd0, 0xb4,
	0x00, 0x92, 0x00, 0x8a, 0x00, 0xb1,
};

static const unsigned char s6e8ax0_22_gamma_140[] = {
	0xfa, 0x01, 0x60, 0x10, 0x60, 0xb7, 0xa0, 0xc5, 0xb2, 0xd0,
	0xb3, 0xc3, 0xde, 0xc3, 0x9b, 0xc2, 0x98, 0xb6, 0xd0, 0xb4,
	0x00, 0x95, 0x00, 0x8d, 0x00, 0xb5,
};

static const unsigned char s6e8ax0_22_gamma_150[] = {
	0xfa, 0x01, 0x60, 0x10, 0x60, 0xb3, 0xa0, 0xc2, 0xb2, 0xd0,
	0xb2, 0xc1, 0xdd, 0xc2, 0x9b, 0xc2, 0x98, 0xb4, 0xcf, 0xb1,
	0x00, 0x99, 0x00, 0x90, 0x00, 0xba,
};

static const unsigned char s6e8ax0_22_gamma_160[] = {
	0xfa, 0x01, 0x60, 0x10, 0x60, 0xaf, 0xa5, 0xbf, 0xb0, 0xd0,
	0xb1, 0xc3, 0xde, 0xc2, 0x99, 0xc1, 0x97, 0xb4, 0xce, 0xb1,
	0x00, 0x9c, 0x00, 0x93, 0x00, 0xbe,
};

static const unsigned char s6e8ax0_22_gamma_170[] = {
	0xfa, 0x01, 0x60, 0x10, 0x60, 0xaf, 0xb5, 0xbf, 0xb1, 0xd1,
	0xb1, 0xc3, 0xde, 0xc3, 0x99, 0xc0, 0x96, 0xb4, 0xce, 0xb1,
	0x00, 0x9f, 0x00, 0x96, 0x00, 0xc2,
};

static const unsigned char s6e8ax0_22_gamma_180[] = {
	0xfa, 0x01, 0x60, 0x10, 0x60, 0xaf, 0xb7, 0xbe, 0xb3, 0xd2,
	0xb3, 0xc3, 0xde, 0xc2, 0x97, 0xbf, 0x95, 0xb4, 0xcd, 0xb1,
	0x00, 0xa2, 0x00, 0x99, 0x00, 0xc5,
};

static const unsigned char s6e8ax0_22_gamma_190[] = {
	0xfa, 0x01, 0x60, 0x10, 0x60, 0xaf, 0xb9, 0xbe, 0xb2, 0xd2,
	0xb2, 0xc3, 0xdd, 0xc3, 0x98, 0xbf, 0x95, 0xb2, 0xcc, 0xaf,
	0x00, 0xa5, 0x00, 0x9c, 0x00, 0xc9,
};

static const unsigned char s6e8ax0_22_gamma_200[] = {
	0xfa, 0x01, 0x60, 0x10, 0x60, 0xaf, 0xb9, 0xbc, 0xb2, 0xd2,
	0xb1, 0xc4, 0xdd, 0xc3, 0x97, 0xbe, 0x95, 0xb1, 0xcb, 0xae,
	0x00, 0xa8, 0x00, 0x9f, 0x00, 0xcd,
};

static const unsigned char s6e8ax0_22_gamma_210[] = {
	0xfa, 0x01, 0x60, 0x10, 0x60, 0xb1, 0xc1, 0xbd, 0xb1, 0xd1,
	0xb1, 0xc2, 0xde, 0xc2, 0x97, 0xbe, 0x94, 0xB0, 0xc9, 0xad,
	0x00, 0xae, 0x00, 0xa4, 0x00, 0xd4,
};

static const unsigned char s6e8ax0_22_gamma_220[] = {
	0xfa, 0x01, 0x60, 0x10, 0x60, 0xb1, 0xc7, 0xbd, 0xb1, 0xd1,
	0xb1, 0xc2, 0xdd, 0xc2, 0x97, 0xbd, 0x94, 0xb0, 0xc9, 0xad,
	0x00, 0xad, 0x00, 0xa2, 0x00, 0xd3,
};

static const unsigned char s6e8ax0_22_gamma_230[] = {
	0xfa, 0x01, 0x60, 0x10, 0x60, 0xb1, 0xc3, 0xbd, 0xb2, 0xd1,
	0xb1, 0xc3, 0xdd, 0xc1, 0x96, 0xbd, 0x94, 0xb0, 0xc9, 0xad,
	0x00, 0xb0, 0x00, 0xa7, 0x00, 0xd7,
};

static const unsigned char s6e8ax0_22_gamma_240[] = {
	0xfa, 0x01, 0x60, 0x10, 0x60, 0xb1, 0xcb, 0xbd, 0xb1, 0xd2,
	0xb1, 0xc3, 0xdD, 0xc2, 0x95, 0xbd, 0x93, 0xaf, 0xc8, 0xab,
	0x00, 0xb3, 0x00, 0xa9, 0x00, 0xdb,
};

static const unsigned char s6e8ax0_22_gamma_250[] = {
	0xfa, 0x01, 0x60, 0x10, 0x60, 0xb3, 0xcc, 0xbe, 0xb0, 0xd2,
	0xb0, 0xc3, 0xdD, 0xc2, 0x94, 0xbc, 0x92, 0xae, 0xc8, 0xab,
	0x00, 0xb6, 0x00, 0xab, 0x00, 0xde,
};

static const unsigned char s6e8ax0_22_gamma_260[] = {
	0xfa, 0x01, 0x60, 0x10, 0x60, 0xb3, 0xd0, 0xbe, 0xaf, 0xd1,
	0xaf, 0xc2, 0xdd, 0xc1, 0x96, 0xbc, 0x93, 0xaf, 0xc8, 0xac,
	0x00, 0xb7, 0x00, 0xad, 0x00, 0xe0,
};

static const unsigned char s6e8ax0_22_gamma_270[] = {
	0xfa, 0x01, 0x60, 0x10, 0x60, 0xb2, 0xcF, 0xbd, 0xb0, 0xd2,
	0xaf, 0xc2, 0xdc, 0xc1, 0x95, 0xbd, 0x93, 0xae, 0xc6, 0xaa,
	0x00, 0xba, 0x00, 0xb0, 0x00, 0xe4,
};

static const unsigned char s6e8ax0_22_gamma_280[] = {
	0xfa, 0x01, 0x60, 0x10, 0x60, 0xb2, 0xd0, 0xbd, 0xaf, 0xd0,
	0xad, 0xc4, 0xdd, 0xc3, 0x95, 0xbd, 0x93, 0xac, 0xc5, 0xa9,
	0x00, 0xbd, 0x00, 0xb2, 0x00, 0xe7,
};

static const unsigned char s6e8ax0_22_gamma_300[] = {
	0xfa, 0x01, 0x60, 0x10, 0x60, 0xb5, 0xd3, 0xbd, 0xb1, 0xd2,
	0xb0, 0xc0, 0xdc, 0xc0, 0x94, 0xba, 0x91, 0xac, 0xc5, 0xa9,
	0x00, 0xc2, 0x00, 0xb7, 0x00, 0xed,
};

static const unsigned char *s6e8ax0_22_gamma_table[] = {
	s6e8ax0_22_gamma_30,
	s6e8ax0_22_gamma_50,
	s6e8ax0_22_gamma_60,
	s6e8ax0_22_gamma_70,
	s6e8ax0_22_gamma_80,
	s6e8ax0_22_gamma_90,
	s6e8ax0_22_gamma_100,
	s6e8ax0_22_gamma_120,
	s6e8ax0_22_gamma_130,
	s6e8ax0_22_gamma_140,
	s6e8ax0_22_gamma_150,
	s6e8ax0_22_gamma_160,
	s6e8ax0_22_gamma_170,
	s6e8ax0_22_gamma_180,
	s6e8ax0_22_gamma_190,
	s6e8ax0_22_gamma_200,
	s6e8ax0_22_gamma_210,
	s6e8ax0_22_gamma_220,
	s6e8ax0_22_gamma_230,
	s6e8ax0_22_gamma_240,
	s6e8ax0_22_gamma_250,
	s6e8ax0_22_gamma_260,
	s6e8ax0_22_gamma_270,
	s6e8ax0_22_gamma_280,
	s6e8ax0_22_gamma_300,
};

static void s6e8ax0_panel_cond(struct s6e8ax0 *lcd)
{
	struct mipi_dsim_master_ops *ops = lcd_to_master_ops(lcd);

	static const unsigned char data_to_send[] = {
		0xf8, 0x3d, 0x35, 0x00, 0x00, 0x00, 0x93, 0x00, 0x3c, 0x7d,
		0x08, 0x27, 0x7d, 0x3f, 0x00, 0x00, 0x00, 0x20, 0x04, 0x08,
		0x6e, 0x00, 0x00, 0x00, 0x02, 0x08, 0x08, 0x23, 0x23, 0xc0,
		0xc8, 0x08, 0x48, 0xc1, 0x00, 0xc1, 0xff, 0xff, 0xc8
	};
	static const unsigned char data_to_send_panel_reverse[] = {
		0xf8, 0x19, 0x35, 0x00, 0x00, 0x00, 0x93, 0x00, 0x3c, 0x7d,
		0x08, 0x27, 0x7d, 0x3f, 0x00, 0x00, 0x00, 0x20, 0x04, 0x08,
		0x6e, 0x00, 0x00, 0x00, 0x02, 0x08, 0x08, 0x23, 0x23, 0xc0,
		0xc1, 0x01, 0x41, 0xc1, 0x00, 0xc1, 0xf6, 0xf6, 0xc1
	};

	if (lcd->dsim_dev->panel_reverse)
		ops->cmd_write(lcd_to_master(lcd), MIPI_DSI_DCS_LONG_WRITE,
				data_to_send_panel_reverse,
				ARRAY_SIZE(data_to_send_panel_reverse));
	else
		ops->cmd_write(lcd_to_master(lcd), MIPI_DSI_DCS_LONG_WRITE,
				data_to_send, ARRAY_SIZE(data_to_send));
}

static void s6e8ax0_display_cond(struct s6e8ax0 *lcd)
{
	struct mipi_dsim_master_ops *ops = lcd_to_master_ops(lcd);
	static const unsigned char data_to_send[] = {
		0xf2, 0x80, 0x03, 0x0d
	};

	ops->cmd_write(lcd_to_master(lcd), MIPI_DSI_DCS_LONG_WRITE,
		data_to_send, ARRAY_SIZE(data_to_send));
}

/* Gamma 2.2 Setting (200cd, 7500K, 10MPCD) */
static void s6e8ax0_gamma_cond(struct s6e8ax0 *lcd)
{
	struct mipi_dsim_master_ops *ops = lcd_to_master_ops(lcd);
	unsigned int gamma = lcd->bd->props.brightness;

	ops->cmd_write(lcd_to_master(lcd), MIPI_DSI_DCS_LONG_WRITE,
			s6e8ax0_22_gamma_table[gamma],
			GAMMA_TABLE_COUNT);
}

static void s6e8ax0_gamma_update(struct s6e8ax0 *lcd)
{
	struct mipi_dsim_master_ops *ops = lcd_to_master_ops(lcd);
	static const unsigned char data_to_send[] = {
		0xf7, 0x03
	};

	ops->cmd_write(lcd_to_master(lcd),
		MIPI_DSI_DCS_SHORT_WRITE_PARAM, data_to_send,
		ARRAY_SIZE(data_to_send));
}

static void s6e8ax0_etc_cond1(struct s6e8ax0 *lcd)
{
	struct mipi_dsim_master_ops *ops = lcd_to_master_ops(lcd);
	static const unsigned char data_to_send[] = {
		0xd1, 0xfe, 0x80, 0x00, 0x01, 0x0b, 0x00, 0x00, 0x40,
		0x0d, 0x00, 0x00
	};

	ops->cmd_write(lcd_to_master(lcd), MIPI_DSI_DCS_LONG_WRITE,
		data_to_send, ARRAY_SIZE(data_to_send));
}

static void s6e8ax0_etc_cond2(struct s6e8ax0 *lcd)
{
	struct mipi_dsim_master_ops *ops = lcd_to_master_ops(lcd);
	static const unsigned char data_to_send[] = {
		0xb6, 0x0c, 0x02, 0x03, 0x32, 0xff, 0x44, 0x44, 0xc0,
		0x00
	};

	ops->cmd_write(lcd_to_master(lcd), MIPI_DSI_DCS_LONG_WRITE,
		data_to_send, ARRAY_SIZE(data_to_send));
}

static void s6e8ax0_etc_cond3(struct s6e8ax0 *lcd)
{
	struct mipi_dsim_master_ops *ops = lcd_to_master_ops(lcd);
	static const unsigned char data_to_send[] = {
		0xe1, 0x10, 0x1c, 0x17, 0x08, 0x1d
	};

	ops->cmd_write(lcd_to_master(lcd), MIPI_DSI_DCS_LONG_WRITE,
		data_to_send, ARRAY_SIZE(data_to_send));
}

static void s6e8ax0_etc_cond4(struct s6e8ax0 *lcd)
{
	struct mipi_dsim_master_ops *ops = lcd_to_master_ops(lcd);
	static const unsigned char data_to_send[] = {
		0xe2, 0xed, 0x07, 0xc3, 0x13, 0x0d, 0x03
	};

	ops->cmd_write(lcd_to_master(lcd), MIPI_DSI_DCS_LONG_WRITE,
		data_to_send, ARRAY_SIZE(data_to_send));
}

static void s6e8ax0_etc_cond5(struct s6e8ax0 *lcd)
{
	struct mipi_dsim_master_ops *ops = lcd_to_master_ops(lcd);
	static const unsigned char data_to_send[] = {
		0xf4, 0xcf, 0x0a, 0x12, 0x10, 0x19, 0x33, 0x02
	};

	ops->cmd_write(lcd_to_master(lcd), MIPI_DSI_DCS_LONG_WRITE,
		data_to_send, ARRAY_SIZE(data_to_send));
}
static void s6e8ax0_etc_cond6(struct s6e8ax0 *lcd)
{
	struct mipi_dsim_master_ops *ops = lcd_to_master_ops(lcd);
	static const unsigned char data_to_send[] = {
		0xe3, 0x40
	};

	ops->cmd_write(lcd_to_master(lcd),
		MIPI_DSI_DCS_SHORT_WRITE_PARAM,
		data_to_send, ARRAY_SIZE(data_to_send));
}

static void s6e8ax0_etc_cond7(struct s6e8ax0 *lcd)
{
	struct mipi_dsim_master_ops *ops = lcd_to_master_ops(lcd);
	static const unsigned char data_to_send[] = {
		0xe4, 0x00, 0x00, 0x14, 0x80, 0x00, 0x00, 0x00
	};

	ops->cmd_write(lcd_to_master(lcd), MIPI_DSI_DCS_LONG_WRITE,
		data_to_send, ARRAY_SIZE(data_to_send));
}

static void s6e8ax0_elvss_set(struct s6e8ax0 *lcd)
{
	struct mipi_dsim_master_ops *ops = lcd_to_master_ops(lcd);
	static const unsigned char data_to_send[] = {
		0xb1, 0x04, 0x00
	};

	ops->cmd_write(lcd_to_master(lcd), MIPI_DSI_DCS_LONG_WRITE,
		data_to_send, ARRAY_SIZE(data_to_send));
}

static void s6e8ax0_elvss_nvm_set(struct s6e8ax0 *lcd)
{
	struct mipi_dsim_master_ops *ops = lcd_to_master_ops(lcd);
	static const unsigned char data_to_send[] = {
		0xd9, 0x5c, 0x20, 0x0c, 0x0f, 0x41, 0x00, 0x10, 0x11,
		0x12, 0xd1, 0x00, 0x00, 0x00, 0x00, 0x80, 0xcb, 0xed,
		0x64, 0xaf
	};

	ops->cmd_write(lcd_to_master(lcd), MIPI_DSI_DCS_LONG_WRITE,
		data_to_send, ARRAY_SIZE(data_to_send));
}

static void s6e8ax0_sleep_in(struct s6e8ax0 *lcd)
{
	struct mipi_dsim_master_ops *ops = lcd_to_master_ops(lcd);
	static const unsigned char data_to_send[] = {
		0x10, 0x00
	};

	ops->cmd_write(lcd_to_master(lcd),
		MIPI_DSI_DCS_SHORT_WRITE,
		data_to_send, ARRAY_SIZE(data_to_send));
}

static void s6e8ax0_sleep_out(struct s6e8ax0 *lcd)
{
	struct mipi_dsim_master_ops *ops = lcd_to_master_ops(lcd);
	static const unsigned char data_to_send[] = {
		0x11, 0x00
	};

	ops->cmd_write(lcd_to_master(lcd),
		MIPI_DSI_DCS_SHORT_WRITE,
		data_to_send, ARRAY_SIZE(data_to_send));
}

static void s6e8ax0_display_on(struct s6e8ax0 *lcd)
{
	struct mipi_dsim_master_ops *ops = lcd_to_master_ops(lcd);
	static const unsigned char data_to_send[] = {
		0x29, 0x00
	};

	ops->cmd_write(lcd_to_master(lcd),
		MIPI_DSI_DCS_SHORT_WRITE,
		data_to_send, ARRAY_SIZE(data_to_send));
}

static void s6e8ax0_display_off(struct s6e8ax0 *lcd)
{
	struct mipi_dsim_master_ops *ops = lcd_to_master_ops(lcd);
	static const unsigned char data_to_send[] = {
		0x28, 0x00
	};

	ops->cmd_write(lcd_to_master(lcd),
		MIPI_DSI_DCS_SHORT_WRITE,
		data_to_send, ARRAY_SIZE(data_to_send));
}

static void s6e8ax0_apply_level2_key(struct s6e8ax0 *lcd)
{
	struct mipi_dsim_master_ops *ops = lcd_to_master_ops(lcd);
	static const unsigned char data_to_send[] = {
		0xf0, 0x5a, 0x5a
	};

	ops->cmd_write(lcd_to_master(lcd), MIPI_DSI_DCS_LONG_WRITE,
		data_to_send, ARRAY_SIZE(data_to_send));
}

static void s6e8ax0_acl_on(struct s6e8ax0 *lcd)
{
	struct mipi_dsim_master_ops *ops = lcd_to_master_ops(lcd);
	static const unsigned char data_to_send[] = {
		0xc0, 0x01
	};

	ops->cmd_write(lcd_to_master(lcd),
		MIPI_DSI_DCS_SHORT_WRITE,
		data_to_send, ARRAY_SIZE(data_to_send));
}

static void s6e8ax0_acl_off(struct s6e8ax0 *lcd)
{
	struct mipi_dsim_master_ops *ops = lcd_to_master_ops(lcd);
	static const unsigned char data_to_send[] = {
		0xc0, 0x00
	};

	ops->cmd_write(lcd_to_master(lcd),
		MIPI_DSI_DCS_SHORT_WRITE,
		data_to_send, ARRAY_SIZE(data_to_send));
}

/* Full white 50% reducing setting */
static void s6e8ax0_acl_ctrl_set(struct s6e8ax0 *lcd)
{
	struct mipi_dsim_master_ops *ops = lcd_to_master_ops(lcd);
	/* Full white 50% reducing setting */
	static const unsigned char cutoff_50[] = {
		0xc1, 0x47, 0x53, 0x13, 0x53, 0x00, 0x00, 0x02, 0xcf,
		0x00, 0x00, 0x04, 0xff,	0x00, 0x00, 0x00, 0x00, 0x00,
		0x01, 0x08, 0x0f, 0x16, 0x1d, 0x24, 0x2a, 0x31, 0x38,
		0x3f, 0x46
	};
	/* Full white 45% reducing setting */
	static const unsigned char cutoff_45[] = {
		0xc1, 0x47, 0x53, 0x13, 0x53, 0x00, 0x00, 0x02, 0xcf,
		0x00, 0x00, 0x04, 0xff,	0x00, 0x00, 0x00, 0x00, 0x00,
		0x01, 0x07, 0x0d, 0x13, 0x19, 0x1f, 0x25, 0x2b, 0x31,
		0x37, 0x3d
	};
	/* Full white 40% reducing setting */
	static const unsigned char cutoff_40[] = {
		0xc1, 0x47, 0x53, 0x13, 0x53, 0x00, 0x00, 0x02, 0xcf,
		0x00, 0x00, 0x04, 0xff,	0x00, 0x00, 0x00, 0x00, 0x00,
		0x01, 0x06, 0x0c, 0x11, 0x16, 0x1c, 0x21, 0x26, 0x2b,
		0x31, 0x36
	};

	if (lcd->acl_enable) {
		if (lcd->cur_acl == 0) {
			if (lcd->gamma == 0 || lcd->gamma == 1) {
				s6e8ax0_acl_off(lcd);
				dev_dbg(&lcd->ld->dev,
					"cur_acl=%d\n", lcd->cur_acl);
			} else
				s6e8ax0_acl_on(lcd);
		}
		switch (lcd->gamma) {
		case 0: /* 30cd */
			s6e8ax0_acl_off(lcd);
			lcd->cur_acl = 0;
			break;
		case 1 ... 3: /* 50cd ~ 90cd */
			ops->cmd_write(lcd_to_master(lcd),
				MIPI_DSI_DCS_LONG_WRITE,
				cutoff_40,
				ARRAY_SIZE(cutoff_40));
			lcd->cur_acl = 40;
			break;
		case 4 ... 7: /* 120cd ~ 210cd */
			ops->cmd_write(lcd_to_master(lcd),
				MIPI_DSI_DCS_LONG_WRITE,
				cutoff_45,
				ARRAY_SIZE(cutoff_45));
			lcd->cur_acl = 45;
			break;
		case 8 ... 10: /* 220cd ~ 300cd */
			ops->cmd_write(lcd_to_master(lcd),
				MIPI_DSI_DCS_LONG_WRITE,
				cutoff_50,
				ARRAY_SIZE(cutoff_50));
			lcd->cur_acl = 50;
			break;
		default:
			break;
		}
	} else {
		s6e8ax0_acl_off(lcd);
		lcd->cur_acl = 0;
		dev_dbg(&lcd->ld->dev, "cur_acl = %d\n", lcd->cur_acl);
	}
}

static void s6e8ax0_read_id(struct s6e8ax0 *lcd, u8 *mtp_id)
{
	unsigned int ret;
	unsigned int addr = 0xd1;	/* MTP ID */
	struct mipi_dsim_master_ops *ops = lcd_to_master_ops(lcd);

	ret = ops->cmd_read(lcd_to_master(lcd),
			MIPI_DSI_GENERIC_READ_REQUEST_1_PARAM,
			addr, 3, mtp_id);
}

static int s6e8ax0_panel_init(struct s6e8ax0 *lcd)
{
	s6e8ax0_apply_level2_key(lcd);
	s6e8ax0_sleep_out(lcd);
	msleep(1);
	s6e8ax0_panel_cond(lcd);
	s6e8ax0_display_cond(lcd);
	s6e8ax0_gamma_cond(lcd);
	s6e8ax0_gamma_update(lcd);

	s6e8ax0_etc_cond1(lcd);
	s6e8ax0_etc_cond2(lcd);
	s6e8ax0_etc_cond3(lcd);
	s6e8ax0_etc_cond4(lcd);
	s6e8ax0_etc_cond5(lcd);
	s6e8ax0_etc_cond6(lcd);
	s6e8ax0_etc_cond7(lcd);

	s6e8ax0_elvss_nvm_set(lcd);
	s6e8ax0_elvss_set(lcd);

	s6e8ax0_acl_ctrl_set(lcd);
	s6e8ax0_acl_on(lcd);

	/* if ID3 value is not 33h, branch private elvss mode */
	msleep(lcd->ddi_pd->power_on_delay);

	return 0;
}

static int s6e8ax0_update_gamma_ctrl(struct s6e8ax0 *lcd, int brightness)
{
	struct mipi_dsim_master_ops *ops = lcd_to_master_ops(lcd);

	ops->cmd_write(lcd_to_master(lcd), MIPI_DSI_DCS_LONG_WRITE,
			s6e8ax0_22_gamma_table[brightness],
			ARRAY_SIZE(s6e8ax0_22_gamma_table));

	/* update gamma table. */
	s6e8ax0_gamma_update(lcd);
	lcd->gamma = brightness;

	return 0;
}

static int s6e8ax0_gamma_ctrl(struct s6e8ax0 *lcd, int gamma)
{
	s6e8ax0_update_gamma_ctrl(lcd, gamma);

	return 0;
}

static int s6e8ax0_set_power(struct lcd_device *ld, int power)
{
	struct s6e8ax0 *lcd = lcd_get_data(ld);
	struct mipi_dsim_master_ops *ops = lcd_to_master_ops(lcd);
	int ret = 0;

	if (power != FB_BLANK_UNBLANK && power != FB_BLANK_POWERDOWN &&
			power != FB_BLANK_NORMAL) {
		dev_err(lcd->dev, "power value should be 0, 1 or 4.\n");
		return -EINVAL;
	}

	if ((power == FB_BLANK_UNBLANK) && ops->set_blank_mode) {
		/* LCD power on */
		if ((POWER_IS_ON(power) && POWER_IS_OFF(lcd->power))
			|| (POWER_IS_ON(power) && POWER_IS_NRM(lcd->power))) {
			ret = ops->set_blank_mode(lcd_to_master(lcd), power);
			if (!ret && lcd->power != power)
				lcd->power = power;
		}
	} else if ((power == FB_BLANK_POWERDOWN) && ops->set_early_blank_mode) {
		/* LCD power off */
		if ((POWER_IS_OFF(power) && POWER_IS_ON(lcd->power)) ||
		(POWER_IS_ON(lcd->power) && POWER_IS_NRM(power))) {
			ret = ops->set_early_blank_mode(lcd_to_master(lcd),
							power);
			if (!ret && lcd->power != power)
				lcd->power = power;
		}
	}

	return ret;
}

static int s6e8ax0_get_power(struct lcd_device *ld)
{
	struct s6e8ax0 *lcd = lcd_get_data(ld);

	return lcd->power;
}

static int s6e8ax0_get_brightness(struct backlight_device *bd)
{
	return bd->props.brightness;
}

static int s6e8ax0_set_brightness(struct backlight_device *bd)
{
	int ret = 0, brightness = bd->props.brightness;
	struct s6e8ax0 *lcd = bl_get_data(bd);

	if (brightness < MIN_BRIGHTNESS ||
		brightness > bd->props.max_brightness) {
		dev_err(lcd->dev, "lcd brightness should be %d to %d.\n",
			MIN_BRIGHTNESS, MAX_BRIGHTNESS);
		return -EINVAL;
	}

	ret = s6e8ax0_gamma_ctrl(lcd, brightness);
	if (ret) {
		dev_err(&bd->dev, "lcd brightness setting failed.\n");
		return -EIO;
	}

	return ret;
}

static struct lcd_ops s6e8ax0_lcd_ops = {
	.set_power = s6e8ax0_set_power,
	.get_power = s6e8ax0_get_power,
};

static const struct backlight_ops s6e8ax0_backlight_ops = {
	.get_brightness = s6e8ax0_get_brightness,
	.update_status = s6e8ax0_set_brightness,
};

static void s6e8ax0_power_on(struct mipi_dsim_lcd_device *dsim_dev, int power)
{
	struct s6e8ax0 *lcd = dev_get_drvdata(&dsim_dev->dev);

	msleep(lcd->ddi_pd->power_on_delay);

	/* lcd power on */
	if (power)
		s6e8ax0_regulator_enable(lcd);
	else
		s6e8ax0_regulator_disable(lcd);

	msleep(lcd->ddi_pd->reset_delay);

	/* lcd reset */
	if (lcd->ddi_pd->reset)
		lcd->ddi_pd->reset(lcd->ld);
	msleep(5);
}

static void s6e8ax0_set_sequence(struct mipi_dsim_lcd_device *dsim_dev)
{
	struct s6e8ax0 *lcd = dev_get_drvdata(&dsim_dev->dev);

	s6e8ax0_panel_init(lcd);
	s6e8ax0_display_on(lcd);

	lcd->power = FB_BLANK_UNBLANK;
}

static int s6e8ax0_probe(struct mipi_dsim_lcd_device *dsim_dev)
{
	struct s6e8ax0 *lcd;
	int ret;
	u8 mtp_id[3] = {0, };

	lcd = devm_kzalloc(&dsim_dev->dev, sizeof(struct s6e8ax0), GFP_KERNEL);
	if (!lcd) {
		dev_err(&dsim_dev->dev, "failed to allocate s6e8ax0 structure.\n");
		return -ENOMEM;
	}

	lcd->dsim_dev = dsim_dev;
	lcd->ddi_pd = (struct lcd_platform_data *)dsim_dev->platform_data;
	lcd->dev = &dsim_dev->dev;

	mutex_init(&lcd->lock);

	ret = devm_regulator_bulk_get(lcd->dev, ARRAY_SIZE(supplies), supplies);
	if (ret) {
		dev_err(lcd->dev, "Failed to get regulators: %d\n", ret);
		return ret;
	}

	lcd->ld = lcd_device_register("s6e8ax0", lcd->dev, lcd,
			&s6e8ax0_lcd_ops);
	if (IS_ERR(lcd->ld)) {
		dev_err(lcd->dev, "failed to register lcd ops.\n");
		return PTR_ERR(lcd->ld);
	}

	lcd->bd = backlight_device_register("s6e8ax0-bl", lcd->dev, lcd,
			&s6e8ax0_backlight_ops, NULL);
	if (IS_ERR(lcd->bd)) {
		dev_err(lcd->dev, "failed to register backlight ops.\n");
		ret = PTR_ERR(lcd->bd);
		goto err_backlight_register;
	}

	lcd->bd->props.max_brightness = MAX_BRIGHTNESS;
	lcd->bd->props.brightness = MAX_BRIGHTNESS;

	s6e8ax0_read_id(lcd, mtp_id);
	if (mtp_id[0] == 0x00)
		dev_err(lcd->dev, "read id failed\n");

	dev_info(lcd->dev, "Read ID : %x, %x, %x\n",
			mtp_id[0], mtp_id[1], mtp_id[2]);

	if (mtp_id[2] == 0x33)
		dev_info(lcd->dev,
			"ID-3 is 0xff does not support dynamic elvss\n");
	else
		dev_info(lcd->dev,
			"ID-3 is 0x%x support dynamic elvss\n", mtp_id[2]);

	lcd->acl_enable = 1;
	lcd->cur_acl = 0;

	dev_set_drvdata(&dsim_dev->dev, lcd);

	dev_dbg(lcd->dev, "probed s6e8ax0 panel driver.\n");

	return 0;

err_backlight_register:
	lcd_device_unregister(lcd->ld);
	return ret;
}

#ifdef CONFIG_PM
static int s6e8ax0_suspend(struct mipi_dsim_lcd_device *dsim_dev)
{
	struct s6e8ax0 *lcd = dev_get_drvdata(&dsim_dev->dev);

	s6e8ax0_sleep_in(lcd);
	msleep(lcd->ddi_pd->power_off_delay);
	s6e8ax0_display_off(lcd);

	s6e8ax0_regulator_disable(lcd);

	return 0;
}

static int s6e8ax0_resume(struct mipi_dsim_lcd_device *dsim_dev)
{
	struct s6e8ax0 *lcd = dev_get_drvdata(&dsim_dev->dev);

	s6e8ax0_sleep_out(lcd);
	msleep(lcd->ddi_pd->power_on_delay);

	s6e8ax0_regulator_enable(lcd);
	s6e8ax0_set_sequence(dsim_dev);

	return 0;
}
#else
#define s6e8ax0_suspend		NULL
#define s6e8ax0_resume		NULL
#endif

static struct mipi_dsim_lcd_driver s6e8ax0_dsim_ddi_driver = {
	.name = "s6e8ax0",
	.id = -1,

	.power_on = s6e8ax0_power_on,
	.set_sequence = s6e8ax0_set_sequence,
	.probe = s6e8ax0_probe,
	.suspend = s6e8ax0_suspend,
	.resume = s6e8ax0_resume,
};

static int s6e8ax0_init(void)
{
	exynos_mipi_dsi_register_lcd_driver(&s6e8ax0_dsim_ddi_driver);

	return 0;
}

static void s6e8ax0_exit(void)
{
	return;
}

module_init(s6e8ax0_init);
module_exit(s6e8ax0_exit);

MODULE_AUTHOR("Donghwa Lee <dh09.lee@samsung.com>");
MODULE_AUTHOR("Inki Dae <inki.dae@samsung.com>");
MODULE_DESCRIPTION("MIPI-DSI based s6e8ax0 AMOLED LCD Panel Driver");
MODULE_LICENSE("GPL");