summaryrefslogtreecommitdiff
path: root/drivers/gpu/drm/nouveau/nvkm/subdev/instmem/nv04.c
blob: 6410cc1fd419c964f298c86ac16146ae821b2a79 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
/*
 * Copyright 2012 Red Hat Inc.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice shall be included in
 * all copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 * OTHER DEALINGS IN THE SOFTWARE.
 *
 * Authors: Ben Skeggs
 */
#include "nv04.h"

#include <core/ramht.h>

/******************************************************************************
 * instmem object implementation
 *****************************************************************************/

static u32
nv04_instobj_rd32(struct nvkm_object *object, u64 addr)
{
	struct nv04_instmem *imem = (void *)nvkm_instmem(object);
	struct nv04_instobj *node = (void *)object;
	return nv_ro32(imem, node->mem->offset + addr);
}

static void
nv04_instobj_wr32(struct nvkm_object *object, u64 addr, u32 data)
{
	struct nv04_instmem *imem = (void *)nvkm_instmem(object);
	struct nv04_instobj *node = (void *)object;
	nv_wo32(imem, node->mem->offset + addr, data);
}

static void
nv04_instobj_dtor(struct nvkm_object *object)
{
	struct nv04_instmem *imem = (void *)nvkm_instmem(object);
	struct nv04_instobj *node = (void *)object;
	mutex_lock(&imem->base.subdev.mutex);
	nvkm_mm_free(&imem->heap, &node->mem);
	mutex_unlock(&imem->base.subdev.mutex);
	nvkm_instobj_destroy(&node->base);
}

static int
nv04_instobj_ctor(struct nvkm_object *parent, struct nvkm_object *engine,
		  struct nvkm_oclass *oclass, void *data, u32 size,
		  struct nvkm_object **pobject)
{
	struct nv04_instmem *imem = (void *)nvkm_instmem(parent);
	struct nv04_instobj *node;
	struct nvkm_instobj_args *args = data;
	int ret;

	if (!args->align)
		args->align = 1;

	ret = nvkm_instobj_create(parent, engine, oclass, &node);
	*pobject = nv_object(node);
	if (ret)
		return ret;

	mutex_lock(&imem->base.subdev.mutex);
	ret = nvkm_mm_head(&imem->heap, 0, 1, args->size, args->size,
			   args->align, &node->mem);
	mutex_unlock(&imem->base.subdev.mutex);
	if (ret)
		return ret;

	node->base.addr = node->mem->offset;
	node->base.size = node->mem->length;
	return 0;
}

struct nvkm_instobj_impl
nv04_instobj_oclass = {
	.base.ofuncs = &(struct nvkm_ofuncs) {
		.ctor = nv04_instobj_ctor,
		.dtor = nv04_instobj_dtor,
		.init = _nvkm_instobj_init,
		.fini = _nvkm_instobj_fini,
		.rd32 = nv04_instobj_rd32,
		.wr32 = nv04_instobj_wr32,
	},
};

/******************************************************************************
 * instmem subdev implementation
 *****************************************************************************/

static u32
nv04_instmem_rd32(struct nvkm_object *object, u64 addr)
{
	struct nvkm_instmem *imem = (void *)object;
	return nvkm_rd32(imem->subdev.device, 0x700000 + addr);
}

static void
nv04_instmem_wr32(struct nvkm_object *object, u64 addr, u32 data)
{
	struct nvkm_instmem *imem = (void *)object;
	nvkm_wr32(imem->subdev.device, 0x700000 + addr, data);
}

void
nv04_instmem_dtor(struct nvkm_object *object)
{
	struct nv04_instmem *imem = (void *)object;
	nvkm_gpuobj_ref(NULL, &imem->ramfc);
	nvkm_gpuobj_ref(NULL, &imem->ramro);
	nvkm_ramht_ref(NULL, &imem->ramht);
	nvkm_gpuobj_ref(NULL, &imem->vbios);
	nvkm_mm_fini(&imem->heap);
	if (imem->iomem)
		iounmap(imem->iomem);
	nvkm_instmem_destroy(&imem->base);
}

static int
nv04_instmem_ctor(struct nvkm_object *parent, struct nvkm_object *engine,
		  struct nvkm_oclass *oclass, void *data, u32 size,
		  struct nvkm_object **pobject)
{
	struct nv04_instmem *imem;
	int ret;

	ret = nvkm_instmem_create(parent, engine, oclass, &imem);
	*pobject = nv_object(imem);
	if (ret)
		return ret;

	/* PRAMIN aperture maps over the end of VRAM, reserve it */
	imem->base.reserved = 512 * 1024;

	ret = nvkm_mm_init(&imem->heap, 0, imem->base.reserved, 1);
	if (ret)
		return ret;

	/* 0x00000-0x10000: reserve for probable vbios image */
	ret = nvkm_gpuobj_new(nv_object(imem), NULL, 0x10000, 0, 0,
			      &imem->vbios);
	if (ret)
		return ret;

	/* 0x10000-0x18000: reserve for RAMHT */
	ret = nvkm_ramht_new(nv_object(imem), NULL, 0x08000, 0, &imem->ramht);
	if (ret)
		return ret;

	/* 0x18000-0x18800: reserve for RAMFC (enough for 32 nv30 channels) */
	ret = nvkm_gpuobj_new(nv_object(imem), NULL, 0x00800, 0,
			      NVOBJ_FLAG_ZERO_ALLOC, &imem->ramfc);
	if (ret)
		return ret;

	/* 0x18800-0x18a00: reserve for RAMRO */
	ret = nvkm_gpuobj_new(nv_object(imem), NULL, 0x00200, 0, 0,
			      &imem->ramro);
	if (ret)
		return ret;

	return 0;
}

struct nvkm_oclass *
nv04_instmem_oclass = &(struct nvkm_instmem_impl) {
	.base.handle = NV_SUBDEV(INSTMEM, 0x04),
	.base.ofuncs = &(struct nvkm_ofuncs) {
		.ctor = nv04_instmem_ctor,
		.dtor = nv04_instmem_dtor,
		.init = _nvkm_instmem_init,
		.fini = _nvkm_instmem_fini,
		.rd32 = nv04_instmem_rd32,
		.wr32 = nv04_instmem_wr32,
	},
	.instobj = &nv04_instobj_oclass.base,
}.base;