summaryrefslogtreecommitdiff
path: root/drivers/fpga/Makefile
blob: 1ac7749b2542b4f7f3977927dde86fda621df5ee (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
# SPDX-License-Identifier: GPL-2.0
#
# Makefile for the fpga framework and fpga manager drivers.
#

# Core FPGA Manager Framework
obj-$(CONFIG_FPGA)			+= fpga-mgr.o

# FPGA Manager Drivers
obj-$(CONFIG_FPGA_MGR_ALTERA_CVP)	+= altera-cvp.o
obj-$(CONFIG_FPGA_MGR_ALTERA_PS_SPI)	+= altera-ps-spi.o
obj-$(CONFIG_FPGA_MGR_ICE40_SPI)	+= ice40-spi.o
obj-$(CONFIG_FPGA_MGR_MACHXO2_SPI)	+= machxo2-spi.o
obj-$(CONFIG_FPGA_MGR_SOCFPGA)		+= socfpga.o
obj-$(CONFIG_FPGA_MGR_SOCFPGA_A10)	+= socfpga-a10.o
obj-$(CONFIG_FPGA_MGR_TS73XX)		+= ts73xx-fpga.o
obj-$(CONFIG_FPGA_MGR_XILINX_SPI)	+= xilinx-spi.o
obj-$(CONFIG_FPGA_MGR_ZYNQ_FPGA)	+= zynq-fpga.o
obj-$(CONFIG_ALTERA_PR_IP_CORE)         += altera-pr-ip-core.o
obj-$(CONFIG_ALTERA_PR_IP_CORE_PLAT)    += altera-pr-ip-core-plat.o

# FPGA Bridge Drivers
obj-$(CONFIG_FPGA_BRIDGE)		+= fpga-bridge.o
obj-$(CONFIG_SOCFPGA_FPGA_BRIDGE)	+= altera-hps2fpga.o altera-fpga2sdram.o
obj-$(CONFIG_ALTERA_FREEZE_BRIDGE)	+= altera-freeze-bridge.o
obj-$(CONFIG_XILINX_PR_DECOUPLER)	+= xilinx-pr-decoupler.o

# High Level Interfaces
obj-$(CONFIG_FPGA_REGION)		+= fpga-region.o
obj-$(CONFIG_OF_FPGA_REGION)		+= of-fpga-region.o

# FPGA Device Feature List Support
obj-$(CONFIG_FPGA_DFL)			+= dfl.o
obj-$(CONFIG_FPGA_DFL_FME)		+= dfl-fme.o
obj-$(CONFIG_FPGA_DFL_FME_MGR)		+= dfl-fme-mgr.o
obj-$(CONFIG_FPGA_DFL_FME_BRIDGE)	+= dfl-fme-br.o
obj-$(CONFIG_FPGA_DFL_FME_REGION)	+= dfl-fme-region.o
obj-$(CONFIG_FPGA_DFL_AFU)		+= dfl-afu.o

dfl-fme-objs := dfl-fme-main.o dfl-fme-pr.o
dfl-afu-objs := dfl-afu-main.o

# Drivers for FPGAs which implement DFL
obj-$(CONFIG_FPGA_DFL_PCI)		+= dfl-pci.o