1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
|
/*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
* Copyright (C) 2014 Imagination Technologies Ltd.
*
*/
#ifndef __ASM_ASM_EVA_H
#define __ASM_ASM_EVA_H
#ifndef __ASSEMBLY__
/* Kernel variants */
#define kernel_cache(op, base) "cache " op ", " base "\n"
#define kernel_pref(hint, base) "pref " hint ", " base "\n"
#define kernel_ll(reg, addr) "ll " reg ", " addr "\n"
#define kernel_sc(reg, addr) "sc " reg ", " addr "\n"
#define kernel_lw(reg, addr) "lw " reg ", " addr "\n"
#define kernel_lwl(reg, addr) "lwl " reg ", " addr "\n"
#define kernel_lwr(reg, addr) "lwr " reg ", " addr "\n"
#define kernel_lh(reg, addr) "lh " reg ", " addr "\n"
#define kernel_lb(reg, addr) "lb " reg ", " addr "\n"
#define kernel_lbu(reg, addr) "lbu " reg ", " addr "\n"
#define kernel_sw(reg, addr) "sw " reg ", " addr "\n"
#define kernel_swl(reg, addr) "swl " reg ", " addr "\n"
#define kernel_swr(reg, addr) "swr " reg ", " addr "\n"
#define kernel_sh(reg, addr) "sh " reg ", " addr "\n"
#define kernel_sb(reg, addr) "sb " reg ", " addr "\n"
#ifdef CONFIG_32BIT
/*
* No 'sd' or 'ld' instructions in 32-bit but the code will
* do the correct thing
*/
#define kernel_sd(reg, addr) user_sw(reg, addr)
#define kernel_ld(reg, addr) user_lw(reg, addr)
#else
#define kernel_sd(reg, addr) "sd " reg", " addr "\n"
#define kernel_ld(reg, addr) "ld " reg", " addr "\n"
#endif /* CONFIG_32BIT */
#ifdef CONFIG_EVA
#define __BUILD_EVA_INSN(insn, reg, addr) \
" .set push\n" \
" .set mips0\n" \
" .set eva\n" \
" "insn" "reg", "addr "\n" \
" .set pop\n"
#define user_cache(op, base) __BUILD_EVA_INSN("cachee", op, base)
#define user_pref(hint, base) __BUILD_EVA_INSN("prefe", hint, base)
#define user_ll(reg, addr) __BUILD_EVA_INSN("lle", reg, addr)
#define user_sc(reg, addr) __BUILD_EVA_INSN("sce", reg, addr)
#define user_lw(reg, addr) __BUILD_EVA_INSN("lwe", reg, addr)
#define user_lwl(reg, addr) __BUILD_EVA_INSN("lwle", reg, addr)
#define user_lwr(reg, addr) __BUILD_EVA_INSN("lwre", reg, addr)
#define user_lh(reg, addr) __BUILD_EVA_INSN("lhe", reg, addr)
#define user_lb(reg, addr) __BUILD_EVA_INSN("lbe", reg, addr)
#define user_lbu(reg, addr) __BUILD_EVA_INSN("lbue", reg, addr)
/* No 64-bit EVA instruction for loading double words */
#define user_ld(reg, addr) user_lw(reg, addr)
#define user_sw(reg, addr) __BUILD_EVA_INSN("swe", reg, addr)
#define user_swl(reg, addr) __BUILD_EVA_INSN("swle", reg, addr)
#define user_swr(reg, addr) __BUILD_EVA_INSN("swre", reg, addr)
#define user_sh(reg, addr) __BUILD_EVA_INSN("she", reg, addr)
#define user_sb(reg, addr) __BUILD_EVA_INSN("sbe", reg, addr)
/* No 64-bit EVA instruction for storing double words */
#define user_sd(reg, addr) user_sw(reg, addr)
#else
#define user_cache(op, base) kernel_cache(op, base)
#define user_pref(hint, base) kernel_pref(hint, base)
#define user_ll(reg, addr) kernel_ll(reg, addr)
#define user_sc(reg, addr) kernel_sc(reg, addr)
#define user_lw(reg, addr) kernel_lw(reg, addr)
#define user_lwl(reg, addr) kernel_lwl(reg, addr)
#define user_lwr(reg, addr) kernel_lwr(reg, addr)
#define user_lh(reg, addr) kernel_lh(reg, addr)
#define user_lb(reg, addr) kernel_lb(reg, addr)
#define user_lbu(reg, addr) kernel_lbu(reg, addr)
#define user_sw(reg, addr) kernel_sw(reg, addr)
#define user_swl(reg, addr) kernel_swl(reg, addr)
#define user_swr(reg, addr) kernel_swr(reg, addr)
#define user_sh(reg, addr) kernel_sh(reg, addr)
#define user_sb(reg, addr) kernel_sb(reg, addr)
#ifdef CONFIG_32BIT
#define user_sd(reg, addr) kernel_sw(reg, addr)
#define user_ld(reg, addr) kernel_lw(reg, addr)
#else
#define user_sd(reg, addr) kernel_sd(reg, addr)
#define user_ld(reg, addr) kernel_ld(reg, addr)
#endif /* CONFIG_32BIT */
#endif /* CONFIG_EVA */
#else /* __ASSEMBLY__ */
#define kernel_cache(op, base) cache op, base
#define kernel_pref(hint, base) pref hint, base
#define kernel_ll(reg, addr) ll reg, addr
#define kernel_sc(reg, addr) sc reg, addr
#define kernel_lw(reg, addr) lw reg, addr
#define kernel_lwl(reg, addr) lwl reg, addr
#define kernel_lwr(reg, addr) lwr reg, addr
#define kernel_lh(reg, addr) lh reg, addr
#define kernel_lb(reg, addr) lb reg, addr
#define kernel_lbu(reg, addr) lbu reg, addr
#define kernel_sw(reg, addr) sw reg, addr
#define kernel_swl(reg, addr) swl reg, addr
#define kernel_swr(reg, addr) swr reg, addr
#define kernel_sh(reg, addr) sh reg, addr
#define kernel_sb(reg, addr) sb reg, addr
#ifdef CONFIG_32BIT
/*
* No 'sd' or 'ld' instructions in 32-bit but the code will
* do the correct thing
*/
#define kernel_sd(reg, addr) user_sw(reg, addr)
#define kernel_ld(reg, addr) user_lw(reg, addr)
#else
#define kernel_sd(reg, addr) sd reg, addr
#define kernel_ld(reg, addr) ld reg, addr
#endif /* CONFIG_32BIT */
#ifdef CONFIG_EVA
#define __BUILD_EVA_INSN(insn, reg, addr) \
.set push; \
.set mips0; \
.set eva; \
insn reg, addr; \
.set pop;
#define user_cache(op, base) __BUILD_EVA_INSN(cachee, op, base)
#define user_pref(hint, base) __BUILD_EVA_INSN(prefe, hint, base)
#define user_ll(reg, addr) __BUILD_EVA_INSN(lle, reg, addr)
#define user_sc(reg, addr) __BUILD_EVA_INSN(sce, reg, addr)
#define user_lw(reg, addr) __BUILD_EVA_INSN(lwe, reg, addr)
#define user_lwl(reg, addr) __BUILD_EVA_INSN(lwle, reg, addr)
#define user_lwr(reg, addr) __BUILD_EVA_INSN(lwre, reg, addr)
#define user_lh(reg, addr) __BUILD_EVA_INSN(lhe, reg, addr)
#define user_lb(reg, addr) __BUILD_EVA_INSN(lbe, reg, addr)
#define user_lbu(reg, addr) __BUILD_EVA_INSN(lbue, reg, addr)
/* No 64-bit EVA instruction for loading double words */
#define user_ld(reg, addr) user_lw(reg, addr)
#define user_sw(reg, addr) __BUILD_EVA_INSN(swe, reg, addr)
#define user_swl(reg, addr) __BUILD_EVA_INSN(swle, reg, addr)
#define user_swr(reg, addr) __BUILD_EVA_INSN(swre, reg, addr)
#define user_sh(reg, addr) __BUILD_EVA_INSN(she, reg, addr)
#define user_sb(reg, addr) __BUILD_EVA_INSN(sbe, reg, addr)
/* No 64-bit EVA instruction for loading double words */
#define user_sd(reg, addr) user_sw(reg, addr)
#else
#define user_cache(op, base) kernel_cache(op, base)
#define user_pref(hint, base) kernel_pref(hint, base)
#define user_ll(reg, addr) kernel_ll(reg, addr)
#define user_sc(reg, addr) kernel_sc(reg, addr)
#define user_lw(reg, addr) kernel_lw(reg, addr)
#define user_lwl(reg, addr) kernel_lwl(reg, addr)
#define user_lwr(reg, addr) kernel_lwr(reg, addr)
#define user_lh(reg, addr) kernel_lh(reg, addr)
#define user_lb(reg, addr) kernel_lb(reg, addr)
#define user_lbu(reg, addr) kernel_lbu(reg, addr)
#define user_sw(reg, addr) kernel_sw(reg, addr)
#define user_swl(reg, addr) kernel_swl(reg, addr)
#define user_swr(reg, addr) kernel_swr(reg, addr)
#define user_sh(reg, addr) kernel_sh(reg, addr)
#define user_sb(reg, addr) kernel_sb(reg, addr)
#ifdef CONFIG_32BIT
#define user_sd(reg, addr) kernel_sw(reg, addr)
#define user_ld(reg, addr) kernel_lw(reg, addr)
#else
#define user_sd(reg, addr) kernel_sd(reg, addr)
#define user_ld(reg, addr) kernel_sd(reg, addr)
#endif /* CONFIG_32BIT */
#endif /* CONFIG_EVA */
#endif /* __ASSEMBLY__ */
#endif /* __ASM_ASM_EVA_H */
|