summaryrefslogtreecommitdiff
path: root/Documentation/devicetree/bindings/ipmi/aspeed,ast2400-kcs-bmc.yaml
blob: 4ff6fabfcb3097408912d97a3efecf59e21fc0b1 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/ipmi/aspeed,ast2400-kcs-bmc.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: ASPEED BMC KCS Devices

maintainers:
  - Andrew Jeffery <andrew@aj.id.au>

description: |
  The Aspeed BMC SoCs typically use the Keyboard-Controller-Style (KCS)
  interfaces on the LPC bus for in-band IPMI communication with their host.

properties:
  compatible:
    oneOf:
      - description: Channel ID derived from reg
        items:
          enum:
            - aspeed,ast2400-kcs-bmc-v2
            - aspeed,ast2500-kcs-bmc-v2
            - aspeed,ast2600-kcs-bmc

      - description: Old-style with explicit channel ID, no reg
        deprecated: true
        items:
          enum:
            - aspeed,ast2400-kcs-bmc
            - aspeed,ast2500-kcs-bmc

  interrupts:
    maxItems: 1

  reg:
    # maxItems: 3
    items:
      - description: IDR register
      - description: ODR register
      - description: STR register

  aspeed,lpc-io-reg:
    $ref: '/schemas/types.yaml#/definitions/uint32-array'
    minItems: 1
    maxItems: 2
    description: |
      The host CPU LPC IO data and status addresses for the device. For most
      channels the status address is derived from the data address, but the
      status address may be optionally provided.

  aspeed,lpc-interrupts:
    $ref: "/schemas/types.yaml#/definitions/uint32-array"
    minItems: 2
    maxItems: 2
    description: |
      A 2-cell property expressing the LPC SerIRQ number and the interrupt
      level/sense encoding (specified in the standard fashion).

      Note that the generated interrupt is issued from the BMC to the host, and
      thus the target interrupt controller is not captured by the BMC's
      devicetree.

  kcs_chan:
    deprecated: true
    $ref: '/schemas/types.yaml#/definitions/uint32'
    description: The LPC channel number in the controller

  kcs_addr:
    deprecated: true
    $ref: '/schemas/types.yaml#/definitions/uint32'
    description: The host CPU IO map address

required:
  - compatible
  - interrupts

additionalProperties: false

allOf:
  - if:
      properties:
        compatible:
          contains:
            enum:
              - aspeed,ast2400-kcs-bmc
              - aspeed,ast2500-kcs-bmc
    then:
      required:
        - kcs_chan
        - kcs_addr
    else:
      required:
        - reg
        - aspeed,lpc-io-reg

examples:
  - |
    #include <dt-bindings/interrupt-controller/irq.h>
    kcs3: kcs@24 {
        compatible = "aspeed,ast2600-kcs-bmc";
        reg = <0x24 0x1>, <0x30 0x1>, <0x3c 0x1>;
        aspeed,lpc-io-reg = <0xca2>;
        aspeed,lpc-interrupts = <11 IRQ_TYPE_LEVEL_LOW>;
        interrupts = <8>;
    };