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path: root/drivers
AgeCommit message (Expand)Author
2014-01-23drm/nv50/gr: print mpc trap name when it's not an mp trapIlia Mirkin
2014-01-23drm/nv50/gr: update list of mp errors, make it a bitfieldIlia Mirkin
2014-01-23drm/nv50/gr: add more trap names to print on errorIlia Mirkin
2014-01-23drm/nouveau/devinit: lock/unlock crtc regs for all devices, not just pre-nv50Ilia Mirkin
2014-01-23drm/nouveau: hold mutex while syncing to kernel channelMaarten Lankhorst
2014-01-23drm/nv50-/devinit: prevent use of engines marked as disabled by hw/vbiosIlia Mirkin
2014-01-23drm/nouveau/device: provide a way for devinit to mark engines as disabledIlia Mirkin
2014-01-23drm/nouveau/devinit: tidy up the subdev class definitionBen Skeggs
2014-01-23drm/nouveau/bar: tidy up the subdev and object class definitionsBen Skeggs
2014-01-23drm/nouveau/instmem: tidy up the object class definitionBen Skeggs
2014-01-23drm/nouveau/instmem: tidy up the subdev class definitionBen Skeggs
2014-01-23drm/nouveau/pwr: implement a simple i2c stackBen Skeggs
2014-01-23drm/nouveau/pwr: have rd/wr32 routines clobber data instead of addrBen Skeggs
2014-01-23drm/nve0/fb: turn off some bits in 10f584 at initBen Skeggs
2014-01-23drm/nve0/fb/gddr5: merge a fix from ddr3 for one of the timing settingsBen Skeggs
2014-01-23drm/nve0/fb/gddr5: yet another random 10f200 bitBen Skeggs
2014-01-23drm/nvc0-/fb: hook up skeleton interrupt handlerBen Skeggs
2014-01-23drm/nve0/fb/gddr5: more 10f200 stuffBen Skeggs
2014-01-23drm/nve0/clk: report ddr memory frequencyBen Skeggs
2014-01-23drm/nouveau/fb/gddr5: make sure we update mr7 when we're supposed toBen Skeggs
2014-01-23drm/nve0/fb/gddr5: 10f698/69cBen Skeggs
2014-01-23drm/nve0/fb: it's now safe to obey the memory voltage setting properlyBen Skeggs
2014-01-23drm/nve0/fb: multi-stage reclock is required for certain transitionsBen Skeggs
2014-01-23drm/nouveau/clk: allow fb to signal it needs to do a multi-stage reclockBen Skeggs
2014-01-23drm/nve0/fb/gddr5: parse bios data into struct rather than using directlyBen Skeggs
2014-01-23drm/nve0/fb/gddr5: found LP3 settingBen Skeggs
2014-01-23drm/nve0/fb: note the memory voltage toggle, not using it yetBen Skeggs
2014-01-23drm/nve0/fb/gddr5: somewhat better attempt at 100770/10f604/610/614Ben Skeggs
2014-01-23drm/nve0/fb/gddr5: fixup delays a bitBen Skeggs
2014-01-23drm/nouveau/bios: timing 2.0 entries can have subentriesBen Skeggs
2014-01-23drm/nve0/fb/gddr5: note another semi-unknownBen Skeggs
2014-01-23drm/nouveau/fb/gddr5: modify mr8 with high bits of CL/WRBen Skeggs
2014-01-23drm/nve0/fb/gddr5: fix calculation of RDQS settingBen Skeggs
2014-01-23drm/nve0/fb/gddr5: switch off some other random bit at some pointBen Skeggs
2014-01-23drm/nve0/fb/gddr5: punt all 10f910/914 accesses through ram_trainBen Skeggs
2014-01-23drm/nve0/fb/gddr5: not all memory partitions are created equalBen Skeggs
2014-01-23drm/nve0/fb: typo in register nameBen Skeggs
2014-01-23drm/nouveau/bios: make common code to handle ramcfg strap etcBen Skeggs
2014-01-23drm/nve0/fb/gddr5: fix an assumption of sane memory controller layoutBen Skeggs
2014-01-23drm/nve0/fb/gddr5: fix behaviour of lp3 settingBen Skeggs
2014-01-23drm/nve0/fifo: recover from mmu faults on bar1/bar3Ben Skeggs
2014-01-23drm/nve0/fifo: keep mmu fault interrupts enabled at all timesBen Skeggs
2014-01-23drm/nve0/fifo: update human-readable mmu fault descriptionsBen Skeggs
2014-01-23drm/nve0/fifo: document more intr status bitsBen Skeggs
2014-01-23drm/nve0/fifo: populate PBDMA status bitfield with more definitionsBen Skeggs
2014-01-23drm/nve0/fifo: s/subfifo/PBDMA/Ben Skeggs
2014-01-23drm/nve0/fifo: s/playlist/runlist/Ben Skeggs
2014-01-23drm/nvf0/gr: enable acceleration with our chsw ucodeBen Skeggs
2014-01-23drm/nv108/gr: enable acceleration with our chsw ucodeBen Skeggs
2014-01-23drm/nvc0-/gr: handle fwmthd interrupts in ucodeBen Skeggs