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AgeCommit message (Expand)Author
2019-03-27net: mvpp2: cls: Rework C2 engine macrosMaxime Chevallier
2019-03-27net: mvpp2: cls: Initialize lookup priorities for all entries in the flowMaxime Chevallier
2019-03-27net: mvpp2: cls: Invalidate all C2 entries except the ones we useMaxime Chevallier
2019-03-27net: mvpp2: cls: Rename the flow table macrosMaxime Chevallier
2019-03-27net: mvpp2: cls: Don't use the sequence attribute for classificationMaxime Chevallier
2019-03-27net: mvpp2: cls: Rename classifer per-port functionsMaxime Chevallier
2019-03-27net: mvpp2: cls: Move C2 read/write helpers aroundMaxime Chevallier
2019-03-27net: mvpp2: cls: Write C2 TCAM data last when writing a C2 entryMaxime Chevallier
2019-03-27net: mvpp2: cls: Use iterators to go through the cls_tableMaxime Chevallier
2019-03-27net: mvpp2: debugfs: Allow reading the C2 engine table from debugfsMaxime Chevallier
2019-03-27net: mvpp2: debugfs: Allow reading the flow table from debugfsMaxime Chevallier
2019-03-27net: mvpp2: debugfs: Store debugfs entries data in mvpp2 structMaxime Chevallier
2019-03-27net: mvpp2: cls: Make the flow definitions constMaxime Chevallier
2019-03-27net: mvpp2: cls: Rename MVPP2_N_FLOWS to MVPP2_N_PRS_FLOWSMaxime Chevallier
2019-03-27net: mvpp2: cls: use Lookup Type in classification enginesMaxime Chevallier
2019-03-27net: mvpp2: cls: Start cls flow entries from beginning of tableMaxime Chevallier
2019-03-27net: mvpp2: cls: Add missing MAC_DA field extractionMaxime Chevallier
2019-03-27net: mvpp2: Don't use an int to store netdev_features_tMaxime Chevallier
2019-03-26dpaa2-eth: use netif_receive_skb_listIoana Ciornei
2019-03-26net: phy: aquantia: inform about proprietary 1000Base-T2 mode being in useHeiner Kallweit
2019-03-26net: phy: aquantia: report PHY details like firmware versionHeiner Kallweit
2019-03-26net: phy: aquantia: print remote capabilities if link partner is Aquantia PHYHeiner Kallweit
2019-03-26net: phy: aquantia: simplify aqr_config_anegHeiner Kallweit
2019-03-25ice: Create a generic name for the ice_rx_flg64_bits structureChinh T Cao
2019-03-25ice: add and use new ice_for_each_traffic_class() macroBruce Allan
2019-03-25ice: change VF VSI tc info along with num_queuesPreethi Banala
2019-03-25ice: Prevent unintended multiple chain resetsDave Ertman
2019-03-25ice: map Rx buffer pages with DMA attributesMaciej Fijalkowski
2019-03-25ice: Limit the ice_add_rx_frag to frag additionMaciej Fijalkowski
2019-03-25ice: Gather the rx buf clean-up logic for better reuseMaciej Fijalkowski
2019-03-25ice: Introduce bulk update for page countMaciej Fijalkowski
2019-03-25ice: Get rid of ice_pull_tailMaciej Fijalkowski
2019-03-25ice: Pull out page reuse checks onto separate functionMaciej Fijalkowski
2019-03-25ice: Retrieve rx_buf in separate functionMaciej Fijalkowski
2019-03-25ice: Enable link events over the ARQBrett Creeley
2019-03-25ice: use irq_num var in ice_vsi_req_irq_msixAlan Brady
2019-03-25ice: Restore VLAN switch rule if port VLAN existed beforeMichal Swiatkowski
2019-03-25ice: update VSI config dynamicallyVictor Raj
2019-03-24net: devlink: select NET_DEVLINK from driversJiri Pirko
2019-03-24bnxt: set devlink port type after registrationJiri Pirko
2019-03-24nfp: move devlink port type set after netdev registrationJiri Pirko
2019-03-24mlxsw: Move devlink_port_attrs_set() call before registerJiri Pirko
2019-03-24bnxt: call devlink_port_type_eth_set() before port registerJiri Pirko
2019-03-24bnxt: set devlink port attrs properlyJiri Pirko
2019-03-24bnxt: add missing net/devlink.h includeJiri Pirko
2019-03-23net: aquantia: enable driver build for arm64 or compile_testIgor Russkikh
2019-03-23net: aquantia: improve LRO configurationNikita Danilov
2019-03-23net: aquantia: Increase rx ring default size from 1K to 2KIgor Russkikh
2019-03-23net: aquantia: Make RX default frame size 2KIgor Russkikh
2019-03-23net: aquantia: Introduce rx refill threshold valueIgor Russkikh
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