summaryrefslogtreecommitdiff
path: root/drivers
AgeCommit message (Expand)Author
2012-11-11drm/i915: Missed lock change with rps lockBen Widawsky
2012-11-11drm/i915: Move the remaining gtt codeBen Widawsky
2012-11-11drm/i915: flush system agent TLBs on SNBBen Widawsky
2012-11-11drm/i915: Kill off now unused gen6+ AGP codeBen Widawsky
2012-11-11drm/i915: Calculate correct stolen size for GEN7+Ben Widawsky
2012-11-11drm/i915: Stop using AGP layer for GEN6+Ben Widawsky
2012-11-11drm/i915: drop the double-OP_STOREDW usage in blt_ring_flushDaniel Vetter
2012-11-11drm/i915: don't rewrite the GTT on resume v4Jesse Barnes
2012-11-11drm/i915: protect RPS/RC6 related accesses (including PCU) with a new mutexJesse Barnes
2012-11-11drm/i915: put ring frequency and turbo setup into a work queue v5Jesse Barnes
2012-11-11drm/i915: don't block resume on fb console resume v2Jesse Barnes
2012-11-11drm/i915: extract l3_parity substruct from dev_privDaniel Vetter
2012-11-11drm/i915: move dri1 dungeon out of dev_privDaniel Vetter
2012-11-11drm/i915: move pwrctx/renderctx to the other ilk power stateDaniel Vetter
2012-11-11drm/i915: move dev_priv->(rps|ips) out of lineDaniel Vetter
2012-11-11drm/i915: move the suspend/resume register file out of dev_privDaniel Vetter
2012-11-11drm/i915: add clock gating regs to VLV offset check functionJesse Barnes
2012-11-11drm/i915: PIPE_CONTROL TLB invalidate requires CS stallJesse Barnes
2012-11-11drm/i915: TLB invalidation with MI_FLUSH_DW requires a post-sync op v3Jesse Barnes
2012-11-11drm/i915: implement WaDisablePSDDualDispatchEnable on IVB & VLVJesse Barnes
2012-11-11drm/i915: implement WaDisableVLVClockGating_VBIIssue on VLVJesse Barnes
2012-11-11drm/i915: implement WaForceL3Serialization on VLV and IVBJesse Barnes
2012-11-11drm/i915: implement WaDisableDopClockGatingisable on VLV and IVBJesse Barnes
2012-11-11drm/i915: implement WaDisableL3CacheAging on VLVJesse Barnes
2012-11-11drm/i915: fix Haswell FDI link disable pathPaulo Zanoni
2012-11-11drm/i915: fix Haswell FDI link training codePaulo Zanoni
2012-11-11drm/i915: remove HAS_eDP as unnecessary and inconsistent indirectionJani Nikula
2012-11-11drm/i915: set the correct number of FDI lanes on HaswellPaulo Zanoni
2012-11-11drm/i915: kill pch_init_clock_gating indirectionDaniel Vetter
2012-11-11drm/i915: implement WADP0ClockGatingDisableDaniel Vetter
2012-11-11drm/i915: CPT+ pch transcoder workaroundDaniel Vetter
2012-11-11drm/i915: drop unnecessary check from fdi_link_train codeDaniel Vetter
2012-11-11drm/i915: check whether the pch is the soulmate of the cpuDaniel Vetter
2012-11-11drm/i915: move panel connectors to the frontDaniel Vetter
2012-11-11drm: add helper to sort panels to the head of the connector listDaniel Vetter
2012-11-11drm/i915: don't assert disabled FDI before disabling the FDIPaulo Zanoni
2012-11-11drm/i915: don't call intel_disable_pch_pll on Haswell/LPTPaulo Zanoni
2012-11-11drm/i915: implement timing override workarounds on LPTPaulo Zanoni
2012-11-11drm/i915: use CPU and PCH transcoders on lpt_disable_pch_transcoderPaulo Zanoni
2012-11-11drm/i915: Add SURFLIVE register definitionsVille Syrjälä
2012-11-11drm/i915: use PIPECONF_INTERLACE_MASK_HSW on lpt_enable_pch_transcoderPaulo Zanoni
2012-11-11drm/i915: don't assert_pch_ports_disabled on LPTPaulo Zanoni
2012-11-11drm/i915: don't rely on previous values when setting LPT TRANSCONFPaulo Zanoni
2012-11-11drm/i915: use CPU and PCH transcoders on lpt_enable_pch_transcoderPaulo Zanoni
2012-11-11drm/i915: don't assert_pch_pll_enabled on lpt_enable_pch_transcoderPaulo Zanoni
2012-11-11drm/i915: remove IBX code from lpt_enable_pch_transcoderPaulo Zanoni
2012-11-11drm/i915: remove Haswell code from ironlake_enable_pch_transcoderPaulo Zanoni
2012-11-11drm/i915: fork lpt version of ironlake_{en, dis}able_pch_transcoderPaulo Zanoni
2012-11-11drm/i915: rename intel_{en, dis}able_transcoderPaulo Zanoni
2012-11-11drm/i915: use the CPU and PCH transcoders on lpt_pch_enablePaulo Zanoni
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-19 22:01:50 +0000