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AgeCommit message (Expand)Author
2021-06-30clk: lmk04832: Fix spelling mistakes in dev_err messages and commentsColin Ian King
2021-06-30clk: lmk04832: fix return value check in lmk04832_probe()Wang Hai
2021-06-30clk: stm32mp1: fix missing spin_lock_init()Wang Hai
2021-06-29Merge branches 'clk-st', 'clk-si' and 'clk-hisilicon' into clk-nextStephen Boyd
2021-06-29Merge branches 'clk-lmk04832', 'clk-stm', 'clk-rohm', 'clk-actions' and 'clk-...Stephen Boyd
2021-06-29Merge branches 'clk-rockchip', 'clk-amlogic', 'clk-yaml', 'clk-zynq' and 'clk...Stephen Boyd
2021-06-29Merge branches 'clk-legacy', 'clk-vc5', 'clk-allwinner', 'clk-nvidia' and 'cl...Stephen Boyd
2021-06-29Merge branches 'clk-qcom', 'clk-versatile', 'clk-renesas', 'clk-sifive' and '...Stephen Boyd
2021-06-28clk: zynqmp: Handle divider specific read only flagRajan Vaja
2021-06-28clk: zynqmp: Use firmware specific mux clock flagsRajan Vaja
2021-06-28clk: zynqmp: Use firmware specific divider clock flagsRajan Vaja
2021-06-28clk: zynqmp: Use firmware specific common clock flagsRajan Vaja
2021-06-28clk: lmk04832: Use of match tableStephen Boyd
2021-06-28clk: lmk04832: Depend on SPIStephen Boyd
2021-06-28clk: stm32mp1: new compatible for secure RCC supportGabriel Fernandez
2021-06-28reset: stm32mp1: remove stm32mp1 resetGabriel Fernandez
2021-06-27clk: hisilicon: Add clock driver for hi3559A SoCDongjiu Geng
2021-06-27clk: si5341: Add sysfs properties to allow checking/resetting device faultsRobert Hancock
2021-06-27clk: si5341: Add silabs,iovdd-33 propertyRobert Hancock
2021-06-27clk: si5341: Add silabs,xaxb-ext-clk propertyRobert Hancock
2021-06-27clk: si5341: Allow different output VDD_SEL valuesRobert Hancock
2021-06-27clk: si5341: Update initialization magicRobert Hancock
2021-06-27clk: si5341: Check for input clock presence and PLL lock on startupRobert Hancock
2021-06-27clk: si5341: Avoid divide errors due to bogus register contentsRobert Hancock
2021-06-27clk: si5341: Wait for DEVICE_READY on startupRobert Hancock
2021-06-27drivers: ti: remove redundant error message in adpll.cYu Jiahua
2021-06-27clk: st: clkgen-fsyn: embed soc clock outputs within compatible dataAlain Volmat
2021-06-27clk: st: clkgen-pll: embed soc clock outputs within compatible dataAlain Volmat
2021-06-27clk: st: flexgen: embed soc clock outputs within compatible dataAlain Volmat
2021-06-27clk: st: clkgen-pll: remove unused variable of struct clkgen_pllAlain Volmat
2021-06-27clk: ingenic: Add support for the JZ4760Paul Cercueil
2021-06-27clk: ingenic: Support overriding PLLs M/N/OD calc algorithmPaul Cercueil
2021-06-27clk: ingenic: Remove pll_info.no_bypass_bitPaul Cercueil
2021-06-27clk: ingenic: Read bypass register only when there is onePaul Cercueil
2021-06-27clk: Support bypassing dividersPaul Cercueil
2021-06-27clk: qcom: clk-alpha-pll: fix CAL_L write in alpha_pll_fabia_prepareJonathan Marek
2021-06-27clk: actions: Add NIC and ETHERNET clock support for Actions S500 SoCCristian Ciocaltea
2021-06-27clk: actions: Fix AHPPREDIV-H-AHB clock chain on Owl S500 SoCCristian Ciocaltea
2021-06-27clk: actions: Fix bisp_factor_table based clocks on Owl S500 SoCCristian Ciocaltea
2021-06-27clk: actions: Fix SD clocks factor table on Owl S500 SoCCristian Ciocaltea
2021-06-27clk: actions: Fix UART clock dividers on Owl S500 SoCCristian Ciocaltea
2021-06-27clk: bd718xx: Drop BD70528 supportMatti Vaittinen
2021-06-27clk: stm32mp1: move RCC reset controller into RCC clock driverGabriel Fernandez
2021-06-27clk: stm32mp1: convert to module driverGabriel Fernandez
2021-06-27clk: stm32mp1: remove intermediate pll clocksGabriel Fernandez
2021-06-27clk: stm32mp1: merge 'ck_hse_rtc' and 'ck_rtc' into one clockGabriel Fernandez
2021-06-27clk: stm32mp1: merge 'clk-hsi-div' and 'ck_hsi' into one clockGabriel Fernandez
2021-06-27clk: lmk04832: add support for digital delayLiam Beguin
2021-06-27clk: add support for the lmk04832Liam Beguin
2021-06-27clk: socfpga: clk-pll: Remove unused variable 'rc'Jian Xin