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The drivers/video directory is a mess. It contains generic video related
files, directories for backlight, console, linux logo, lots of fbdev
device drivers, fbdev framework files.
Make some order into the chaos by creating drivers/video/fbdev
directory, and move all fbdev related files there.
No functionality is changed, although I guess it is possible that some
subtle Makefile build order related issue could be created by this
patch.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Acked-by: Geert Uytterhoeven <geert@linux-m68k.org>
Acked-by: Rob Clark <robdclark@gmail.com>
Acked-by: Jingoo Han <jg1.han@samsung.com>
Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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Avoid colision with regmap's struct reg_field definition by renaming
omapdss's struct reg_field to dispc_reg_field, and moving it inside
dispc.c as that's the only place it is used.
Signed-off-by: Jyri Sarha <jsarha@ti.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
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Pixelclock unit change from kHz to Hz should be taken into account
in CTS value calculations in hdmi_compute_acr().
Signed-off-by: Jyri Sarha <jsarha@ti.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
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DSS uses shared irq handlers for DISPC and DSI, because on OMAP3, the
DISPC and DSI share the same irq line.
However, the irq handlers presume that the hardware is enabled, which,
in theory, may not be the case with shared irq handlers. So if an
interrupt happens while the DISPC/DSI is off, the kernel will halt as
the irq handler tries to access the DISPC/DSI registers.
In practice that should never happen, as both DSI and DISPC are in the
same power domain. So if there's an IRQ for one of them, the other is
also enabled. However, if CONFIG_DEBUG_SHIRQ is enabled, the kernel will
generate a spurious IRQ, which then causes the problem.
This patch adds an is_enabled field for both DISPC and DSI, which is
used to track if the HW is enabled. For DISPC the code is slightly more
complex, as the users of DISPC can register the interrupt handler, and
we want to hide the is_enabled handling from the users of DISPC.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
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"clk: divider: fix rate calculation for fractional rates" patch (and
similar for TI specific divider) fixes the clk-divider's rounding. This
patch updates the DSS driver to round the rates accordingly.
This fixes the DSS's warnings about clock rate mismatch, and also fixes
the wrong fclk rate being set.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Tested-by: Christoph Fritz <chf.fritz@googlemail.com>
Tested-by: Marek Belisko <marek@goldelico.com>
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The HDMI output video format's yres needs to be divided by two for
interlace. Fix it.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
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dss_init_ports() is missing __init, so fix that.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
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For booting Panda and 4430SDP with DT, while DSS did not support DT, we
had to had small hacks in the omapdss driver to get the regulators. With
DT now supported in DSS, we can remove those hacks.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
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Merge OMAP DSS DT support
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Add the code to make the DSI driver work with device tree on OMAP3 and
OMAP4.
A minor hack is needed at the moment in the DSI driver: the DSS driver
needs to know the ID number of a DSI device, as clocks are routed in
different ways to the DSI devices. At the moment we don't have any
proper way to manage this, so this patchs adds a simple lookup table
that is used to deduce the ID from the DSI device's base address.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Reviewed-by: Archit Taneja <archit@ti.com>
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Add DT support to VENC.
In contrast to non-DT version, the DT version gets the invert-polarity
and connector type via venc's endpoint, not from the connector.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Reviewed-by: Archit Taneja <archit@ti.com>
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Add DT support to HDMI driver. The only thing needed for DT support here
is the of_match_table.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Reviewed-by: Archit Taneja <archit@ti.com>
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Add DT support to DISPC. Only thing needed here is the of_match_table.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Reviewed-by: Archit Taneja <archit@ti.com>
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Add DT support for DSS. Contrary to the non-DT version, the DSS in DT
mode contains DPI and SDI outputs, which better reflects the hardware.
The non-DT code will be removed after all boards have been converted to
DT, so there's no need to change the non-DT code to act the same way.
The code for DPI and SDI needs to be refined later to make it possible
to add multiple DPI ports. For now, handling just a single DPI port is
enough for all the boards.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Reviewed-by: Archit Taneja <archit@ti.com>
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The regulator names used for DSS components are somewhat ugly for DT
use. As we're just adding DT support, it's simple to change the
regulator names.
This patch makes the DSS driver get the regulators with somewhat cleaner
names when bootin with DT. For example, this allows us to define HDMI's
VDDA regulator in the DT data as:
vdda-supply = <...>;
instead of
vdda_hdmi_dac-supply = <...>;
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Reviewed-by: Archit Taneja <archit@ti.com>
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Add helpers to get ports and endpoints from DT data.
These helpers parse v4l2 style ports and endpoints, but compared to the
v4l2 helpers, these allow iterating ports and endpoints separately.
This is a temporary solution until we get generic code to parse the
ports and endpoints.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Reviewed-by: Archit Taneja <archit@ti.com>
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We currently create a "displayX" style alias name for all displays,
using a number that is incremented for each registered display. With the
new DSS device model there is no clear order in which the displays are
registered, and thus the numbering is somewhat random.
This patch improves the behavior for DT case so that if the displays
have been assigned DT aliases, those aliases will be used as DSS
aliases.
This means that "display0" is always the one specified in the DT alias,
and thus display0 can be used as default display in case the user didn't
specify a default display.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Reviewed-by: Archit Taneja <archit@ti.com>
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Add support to get the label (i.e. a "nickname") for a display from the
DT data. If there is no label defined, use the display's alias (e.g.
'display0') as a name.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Reviewed-by: Archit Taneja <archit@ti.com>
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omapdss has its own video-timings struct, but we want to move the common
videomode.
The first step is to change the omapdss's pixelclock unit from kHz to
Hz. Also, omapdss uses "pixel_clock" field name, whereas the common
videomode uses "pixelclock" field name. This patch changes the field
name also, as that makes it easy to spot any non-converted pixel_clock
uses.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
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The omapdss driver no longer uses get_context_loss_count call, so we can
remove it.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Reviewed-by: Archit Taneja <archit@ti.com>
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Instead of relying on the OMAP specific
omap_pm_get_dev_context_loss_count() to detect register context loss, we
can achieve the same in a much simpler way by just observing the DISPC
registers.
We always set DISPC's load mode to LOAD_FRAME_ONLY, which is not the
reset value. Thus we can just observe the load mode to see if we have
lost register context.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Reviewed-by: Archit Taneja <archit@ti.com>
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'fck' field in dpi and sdi clock calculation struct is 'unsigned long
long', even though it should be 'unsigned long'. This hasn't caused any
issues so far.
Fix the field's type.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
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The driver uses DIV_ROUND_UP when calculating decimated width & height.
For example, when decimating with 3, the width is calculated as:
width = DIV_ROUND_UP(width, decim_x);
This yields bad results for some values. For example, 800/3=266.666...,
which is rounded to 267. When the input width is set to 267, and pixel
increment is set to 3, this causes the dispc to read a line of 801
pixels, i.e. it reads a wrong pixel at the end of the line.
Even more pressing, the above rounding causes a BUG() in pixinc(), as
the value of 801 is used to calculate row increment, leading to a bad
value being passed to pixinc().
This patch fixes the decimation by removing the DIV_ROUND_UP()s when
calculating width and height for decimation.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
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Pull drm updates from Dave Airlie:
"Been a bit busy, first week of kids school, and waiting on other trees
to go in before I could send this, so its a bit later than I'd
normally like.
Highlights:
- core:
timestamp fixes, lots of misc cleanups
- new drivers:
bochs virtual vga
- vmwgfx:
major overhaul for their nextgen virt gpu.
- i915:
runtime D3 on HSW, watermark fixes, power well work, fbc fixes,
bdw is no longer prelim.
- nouveau:
gk110/208 acceleration, more pm groundwork, old overlay support
- radeon:
dpm rework and clockgating for CIK, pci config reset, big endian
fixes
- tegra:
panel support and DSI support, build as module, prime.
- armada, omap, gma500, rcar, exynos, mgag200, cirrus, ast:
fixes
- msm:
hdmi support for mdp5"
* 'drm-next' of git://people.freedesktop.org/~airlied/linux: (595 commits)
drm/nouveau: resume display if any later suspend bits fail
drm/nouveau: fix lock unbalance in nouveau_crtc_page_flip
drm/nouveau: implement hooks for needed for drm vblank timestamping support
drm/nouveau/disp: add a method to fetch info needed by drm vblank timestamping
drm/nv50: fill in crtc mode struct members from crtc_mode_fixup
drm/radeon/dce8: workaround for atom BlankCrtc table
drm/radeon/DCE4+: clear bios scratch dpms bit (v2)
drm/radeon: set si_notify_smc_display_change properly
drm/radeon: fix DAC interrupt handling on DCE5+
drm/radeon: clean up active vram sizing
drm/radeon: skip async dma init on r6xx
drm/radeon/runpm: don't runtime suspend non-PX cards
drm/radeon: add ring to fence trace functions
drm/radeon: add missing trace point
drm/radeon: fix VMID use tracking
drm: ast,cirrus,mgag200: use drm_can_sleep
drm/gma500: Lock struct_mutex around cursor updates
drm/i915: Fix the offset issue for the stolen GEM objects
DRM: armada: fix missing DRM_KMS_FB_HELPER select
drm/i915: Decouple GPU error reporting from ring initialisation
...
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Merge fbdev topic branches
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commit 7faa92339bbb1e6b9a80983b206642517327eb75 OMAPDSS: DISPC: Handle
synclost errors in OMAP3 introduces limits check to prevent SYNCLOST errors
on OMAP3. However, it misses the logic found in Nokia kernels that is
needed to correctly calculate whether 3 tap or 5 tap rescaler to be used as
well as the logic to fallback to 3 taps if 5 taps clock results in too
tight horizontal timings. Without that patch "horizontal timing too tight"
errors are seen when a video with resolution above 640x350 is tried to be
played. The patch is a forward-ported logic found in Nokia N900 and N9/50
kernels.
Signed-off-by: Ivaylo Dimitrov <ivo.g.dimitrov.75@gmail.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
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DISPC pipeline DMAs preload some bytes of pixel data in the vertical blanking
region before the start of each frame. The preload ensures the pipeline doesn't
underflow when the active region of the display starts.
DISPC_GFX/VIDp_PRELOAD registers allow us to program how many bytes of data
should be preloaded for each pipeline. Calculating a precise preload value
would be a complex function of the pixel clock of the connected display, the
vertical blanking duration and the interconnect traffic at that instance. If
the register is left untouched, a default value is preloaded.
We observe underflows for OMAP4+ SoCs for certain bandwidth intensive use cases
with many other initiators active, and in situations where memory access isn't
very efficient(like accessing Tiler mapped buffers and EMIF configured in
non-interleaved more). The cause of the underflow is because the default preload
value isn't sufficient for the DMA to reach a steady state. We configure the
PRELOAD register such that the pipelines preload data up to the high threshold
of the FIFO.
Preloading lot of data for older SoCs can have a negative impact. Due to slower
interconnects, it's possible that the DISPC DMA cannot preload up to the high
threshold within the vertical blanking region of the panel. We leave the PRELOAD
registers to their reset values since we haven't faced underflows with these
SoCs because of low value of PRELOAD.
Signed-off-by: Archit Taneja <archit@ti.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
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Nowadays it's normal to get -EPROBE_DEFER from, e.g., regulator_get. As
-EPROBE_DEFER is not really an error, and the driver will be probed fine
a bit later, printing an error message will just confuse the user.
This patch changes omapdss to print an error for regulator_gets only if
the error code is something else than -EPROBE_DEFER.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
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The HDMI driver tries to get the needed memory resources by name and by
ID. Resources by name are not currently defined, and will be used with
DT boot.
The resource names used in the driver are not quite perfect, and as they
are not used yet, we can change them. This patch removes the unneeded
"hdmi_" prefix from the names, and simplifies the names (e.g. hdmi_txphy
-> phy).
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
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DSI contains three separate blocks: protocol engine, PHY and PLL. At the
moment, all these are memory mapped in one big chunk. We need to split
that memory map into smaller pieces so that we can add proper 'reg'
properties into the DT data for each block.
This patch changes the driver to map the blocks separately. It first
tries to get the memory resource using name, used when booting with DT,
and if that fails, it gets the memory resource by ID, in which case the
driver gets the big chunk from platform data. That big chunk is then
split into the smaller blocks manually.
After DSS DT code has been merged and the old platform code removed, we
can clean up the memory resource management.
Instead of changing the driver in all the places where a register is
read or written, this patch takes a shortcut: it adds an additional
number to the struct which represents the register index. This number is
used to decide which base address to use. In the future we should
consider other approaches.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
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HDMI_IRQ_CORE was not defined in the hdmi.h.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
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HDMI_WP_CLK was wrongly defined as HDMI_WP_WP_CLK. Fix that.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
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hdmi_wait_for_bit_change() has two issues:
The register index was passed as u16, even if the register index may be
u32. Fix the index to u32.
The function was copied from wait_for_bit_change() which waits for a
single bit to change, but the hdmi version was changed to wait for a bit
field. This change was not done correctly.
The function is supposed to return the (last) value of the bit field,
but it returned !val in case of timeout. This was correct for the single
bit version, but not for the hdmi version. Fix the function to return
the actual value in the register.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
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DISPC_MSTANDBY_CTRL register is used in the driver, but it's not
restored in dispc_restore_context(), causing problems after resume.
Instead of adding DISPC_MSTANDBY_CTRL to dispc_restore_context(), let's
call _omap_dispc_initial_config() as the first thing in
dispc_runtime_resume(). This will initialize the DISPC core registers
properly, and will avoid similar issues in the future.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
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For some reason the hdmi driver first turns off the video output when
it's about to enable the video output. This serves no purpose, and can
be removed.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
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The hdmi4 driver currently rejects any timing which is not from the CEA or VESA
standards. This leads hdmi rejecting any non-standard mode. A non standard
timing may not have a valid code corresponding to it. In such cases, the HDMI
spec suggests to set the code to 0.
Modify the driver to check if the timings fall within the range of the DISPC
TV overlay manager, and remove the check for an invalid code. Add a debug print
specifying the mode and code in hdmi_display_set_timing.
Signed-off-by: Archit Taneja <archit@ti.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
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omapdrm (un)registers irqs inside an irq handler. The problem is that
the (un)register function uses dispc_runtime_get/put() to enable the
clocks, and those functions are not irq safe by default.
This was kind of fixed in 48664b21aeeffb40c5fa06843f18052e2c4ec9ef
(OMAPDSS: DISPC: set irq_safe for runtime PM), which makes dispc's
runtime calls irq-safe.
However, using pm_runtime_irq_safe in dispc makes the parent of dispc,
dss, always enabled, effectively preventing PM for the whole DSS module.
This patch makes omapdrm behave better by adding new irq (un)register
functions that do not use dispc_runtime_get/put, and using those
functions in interrupt context. Thus we can make dispc again
non-irq-safe, allowing proper PM.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Cc: Rob Clark <robdclark@gmail.com>
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DSI has separate TX and RX fifos. However, the current code only has one
field where the fifo size is stored, and the code for both TX and RX
config write to the same field. This has not caused issues, as we've
been using the same fifo sizes.
Fix this bug by creating separate fields for TX and RX fifo sizes.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
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omapdss in compat mode creates some sysfs files into the device's sysfs
directory, including a 'name' file. This works fine for
platform_devices, but breaks with i2c or spi devices, as those already
have a 'name' file.
Fix this by renaming the omapdss's 'name' file to 'display_name'.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
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OMAP5 has MFLAG feature in DISPC. Add the register definition and dump
it. The register is not used yet, though.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
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When omapfb does ovl->get_overlay_info, ovl->set_overlay_info, the set
function may fail even if the info has not been changed. This is because
omapdss doesn't initialize the info, but expect the caller to set valid
values.
Normally that is the case, but there is at least one corner case: if
omapfb has not allocated memory for the overlay yet, and the user uses
ioctl to disable the overlay to make sure it's disabled. In this case
get_overlay_info returns invalid data, but the user is only interested
in setting the overlay to disabled, not configuring it, and
set_overlay_info fails.
The issue is made possible by the omapfb's setup_plane ioctl, which
groups overlay configuration and overlay enable/disable bit into the
same struct. Thus, when you are disabling an overlay, you are also
configuring it.
This is a bit counter intuitive, so I think it's better to initialize
the info to some valid values.
The fields requiring initialization are color_mode and rotation_type,
and also we need to remove the check for (paddr == 0), as paddr is 0 for
unallocated overlay (but it's still fine to disable the overlay).
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
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Fix debug prints all over omapdss:
* add missing linefeeds
* change pr_err/pr_debug to DSSERR/DSSDBG
* add missing DSS_SUBSYS_NAMEs
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
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Functions dispc_ovl_set_fifo_threshold and
dispc_ovl_compute_fifo_thresholds need to be exported. Add the
EXPORT_SYMBOLs.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
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This patch adds support for SoCs that have a dedicated DSS PLL used for
DSS function clock.
If there is no dss parent clock defined, it is presumed that the
functionl clock rate can be set (almost) freely. The code calculates the
highest allowed fck rate, which when divided with some integer gives the
required pck.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
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We need the required pixel clock rate when calculating the dss fclk on
SoCs that have a dedicated DSS PLL.
This patch changes the code to pass the pck to the calc functions. The
pck rate is taken into use in the next patch.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
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The dss parent_clk_name currently points to a clock node which we use to
change the fclk rate. Now that we have CLK_SET_RATE_PARENT properly set,
we can set the rate directly to the fclk node.
However, we still need to calculate the possible clock rates. For this,
we need the rate of the parent of the current parent_clk.
To simplify the code, this patch changes the parent_clk_name to point to
the above mentioned parent, so that we can get the rate directly.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
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Rename the variables related to DSS fclk's parent: "clk_name" and
"dpll4_m4_ck", to "parent_clk_name" and "parent_clk", which much better
tell what they mean.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
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Simplify dss_dump_clocks() so that it doesn't make any presumptions
about the DSS fclks nature.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
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Remove struct dss_clock_info, as it is not usable in a case where DSS
fclk comes from a dedicated PLL. Instead, just use the fclk rate in
place of dss_clock_info, as that is all that's needed.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
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The driver considers OMAP2 DSS's functional clock as a fixed clock.
However, it can be changed, but the possible dividers are not continuous
which is why it was just handled as a fixed clock.
As a partial fix, this patch changes the code to handle the continous
part of the dividers, from 1 to 6. This let's us handle the OMAP2 fck
the same way as fcks on other OMAPs.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
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