linux.git - Unnamed repository; edit this file 'description' to name the repository.

Age	Commit message (Expand)	Author
2020-09-06	soc: bcm: brcmstb: biuctrl: Change RAC data line prefetching after 4 consecut...	Florian Fainelli
2020-09-04	soc: bcm: brcmstb: biuctrl: Change RAC prefetch distance from +/-1 to +/- 2	Florian Fainelli
2020-09-04	soc: bcm: brcmstb: biuctrl: Tune MCP settings for 72165	Florian Fainelli
2020-09-04	soc: bcm: brcmstb: biuctrl: Tune MCP settings for 72164	Florian Fainelli
2020-08-17	soc: bcm: brcmstb: biuctrl: Enable Read-ahead cache	Florian Fainelli
2020-01-05	soc: bcm: brcmstb: biuctrl: Update programming for 7211	Florian Fainelli
2020-01-05	soc: bcm: brcmstb: biuctrl: Update layout for A72 on 7211	Florian Fainelli
2020-01-05	soc: bcm: brcmstb: biuctrl: Tune interface for 7255 and 7216	Florian Fainelli
2020-01-05	soc: bcm: brcmstb: biuctrl: Tune 7260 BIU interface	Florian Fainelli
2019-06-16	Merge tag 'arm-soc/for-5.2/drivers-fixes' of https://github.com/Broadcom/stbl...	Olof Johansson
2019-05-30	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 174	Thomas Gleixner
2019-05-20	soc: bcm: brcmstb: biuctrl: Register writes require a barrier	Florian Fainelli
2019-05-20	soc: brcmstb: Fix error path for unsupported CPUs	Florian Fainelli
2018-01-15	soc: brcmstb: biuctrl: exit without warning on non brcmstb platforms	Sudeep Holla
2017-12-20	soc: brcmstb: biuctrl: Move to early_initcall	Florian Fainelli
2017-12-20	soc: brcmstb: biuctrl: Fine tune B53 MCP interface settings	Florian Fainelli
2017-12-20	soc: brcmstb: biuctrl: Wire-up new registers	Florian Fainelli
2017-12-20	soc: brcmstb: biuctrl: Prepare for saving/restoring other registers	Florian Fainelli
2017-12-20	soc: brcmstb: Correct CPU_CREDIT_REG offset for Brahma-B53 CPUs	Florian Fainelli
2017-12-20	soc: brcmstb: Make CPU credit offset more parameterized	Florian Fainelli
2016-06-07	soc: brcmstb: fix warning from missing include	Ben Dooks
2016-05-31	soc: Move brcmstb to bcm/brcmstb	Florian Fainelli