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path: root/drivers/pinctrl/aspeed
AgeCommit message (Expand)Author
2017-01-26pinctrl: aspeed: g4: Fix mux configuration for GPIOs AA[4-7], AB[0-7]Andrew Jeffery
2016-12-28pinctrl: aspeed: Fix kerneldoc return descriptionsAndrew Jeffery
2016-12-28pinctrl: aspeed-g5: Add mux configuration for all pinsAndrew Jeffery
2016-12-27pinctrl: aspeed-g4: Add mux configuration for all pinsAndrew Jeffery
2016-12-27pinctrl: aspeed: Read and write bits in LPC and GFX controllersAndrew Jeffery
2016-11-07pinctrl-aspeed-g5: Never set SCU90[6]Andrew Jeffery
2016-10-18pinctrl: aspeed-g5: Fix pin association of SPI1 functionAndrew Jeffery
2016-10-18pinctrl: aspeed-g5: Fix GPIOE1 typoAndrew Jeffery
2016-10-18pinctrl: aspeed-g5: Fix names of GPID2 pinsAndrew Jeffery
2016-10-18pinctrl: aspeed: "Not enabled" is a significant mux stateAndrew Jeffery
2016-09-13pinctrl: aspeed: fix regmap error handlingArnd Bergmann
2016-09-07pinctrl: Add pinctrl-aspeed-g5 driverAndrew Jeffery
2016-09-07pinctrl: Add pinctrl-aspeed-g4 driverAndrew Jeffery
2016-09-07pinctrl: Add core support for Aspeed SoCsAndrew Jeffery
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