summaryrefslogtreecommitdiff
path: root/drivers/mtd/nand/marvell_nand.c
AgeCommit message (Collapse)Author
2018-02-16mtd: nand: move raw NAND related code to the raw/ subdirBoris Brezillon
As part of the process of sharing more code between different NAND based devices, we need to move all raw NAND related code to the raw/ subdirectory. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
2018-02-12mtd: nand: add ->setup_data_interface() support for Marvell NFCv1Miquel Raynal
First generation of Marvell NAND flash controllers (eg. embedded in PXA boards) did not make use of the NAND core hook ->setup_data_interface() to setup controller timings. Add support for it. Signed-off-by: Miquel Raynal <miquel.raynal@free-electrons.com> Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
2018-01-20mtd: nand: marvell: Fix missing memory allocation modifierMiquel Raynal
The function marvell_nfc_init_dma() allocates a DMA buffer without the GFP_KERNEL modifier, that triggers this warning: "marvell_nfc_init_dma() error: no modifiers for allocation." Fix this by using (GFP_KERNEL | GFP_DMA) instead of only GFP_DMA as the probe happens in non-interrupt context. Fixes: 02f26ecf8c77 ("mtd: nand: add reworked Marvell NAND controller driver") Reported-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Miquel Raynal <miquel.raynal@free-electrons.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2018-01-19mtd: nand: marvell: remove redundant variable 'oob_len'Colin Ian King
Variable oob_len is assigned and never read, hence it is redundant and can be removed. Cleans up clang warnings: drivers/mtd/nand/marvell_nand.c:1356:6: warning: Value stored to 'oob_len' during its initialization is never read drivers/mtd/nand/marvell_nand.c:1369:4: warning: Value stored to 'oob_len' is never read Signed-off-by: Colin Ian King <colin.king@canonical.com> Acked-by: Miquel Raynal <miquel.raynal@free-electrons.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2018-01-19mtd: nand: marvell: fix spelling mistake: "suceed"-> "succeed"Colin Ian King
Trivial fix to spelling mistakes in dev_err error message text. Signed-off-by: Colin Ian King <colin.king@canonical.com> Acked-by: Miquel Raynal <miquel.raynal@free-electrons.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2018-01-12mtd: nand: add reworked Marvell NAND controller driverMiquel Raynal
Add marvell_nand driver which aims at replacing the existing pxa3xx_nand driver. The new driver intends to be easier to understand and follows the brand new NAND framework rules by implementing hooks for every pattern the controller might support and referencing them inside a parser object that will be given to the core at each ->exec_op() call. Raw accessors are implemented, useful to test/debug memory/filesystem corruptions. Userspace binaries contained in the mtd-utils package may now be used and their output trusted. Most of the DT nodes using the old driver kept non-optimal timings from the bootloader (even if there was some mechanisms to derive them if the chip was ONFI compliant). The new default is to implement ->setup_data_interface() and follow the core's decision regarding the chip. Thanks to the improved timings, implementation of ONFI mode 5 support (with EDO managed by adding a delay on data sampling), merging the commands together and optimizing writes in the command registers, the new driver may achieve faster throughputs in both directions. Measurements show an improvement of about +23% read throughput and +24% write throughput. These measurements have been done with an Armada-385-DB-AP (4kiB NAND pages forced in 4-bit strength BCH ECC correction) using the userspace tool 'flash_speed' from the MTD test suite. Besides these important topics, the new driver addresses several unsolved known issues in the old driver which: - did not work with ECC soft neither with ECC none ; - relied on naked read/write (which is unchanged) while the NFCv1 embedded in the pxa3xx platforms do not implement it, so several NAND commands did not actually ever work without any notice (like reading the ONFI PARAM_PAGE or SET/GET_FEATURES) ; - wrote the OOB data correctly, but was not able to read it correctly past the first OOB data chunk ; - did not retrieve ECC bytes ; - used device tree bindings that did not allow more than one NAND chip, and did not allow to choose the correct chip select if not incrementing from 0. Plus, the Ready/Busy line used had to be 0. Old device tree bindings are still supported but deprecated. A more hierarchical view has to be used to keep the controller and the NAND chip structures clearly separated both inside the device tree and also in the driver code. Signed-off-by: Miquel Raynal <miquel.raynal@free-electrons.com> Tested-by: Sean Nyekjaer <sean.nyekjaer@prevas.dk> Tested-by: Willy Tarreau <w@1wt.eu> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>