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path: root/drivers/gpu/drm/i915/i915_reg.h
AgeCommit message (Expand)Author
2017-01-13drm/i915/psr: report live PSR2 StateNagaraju, Vathsala
2017-01-13drm/i915/psr: set PSR_MASK bits for deep sleepNagaraju, Vathsala
2017-01-13drm/i915/psr: set CHICKEN_TRANS for psr2Nagaraju, Vathsala
2017-01-12drm/i915/psr: fix blank screen issue for psr2Nagaraju, Vathsala
2016-12-22drm/i915: Disable L2 cache clock gating on 830 when using the overlayVille Syrjälä
2016-12-21drm/i915/glk: Add new bit fields in MIPI CTRL registerDeepak M
2016-12-02drm/i915/glk: Update Port PLL enable sequence for GeminilkaeMadhav Chauhan
2016-12-02drm/i915/glk: Set DCC delay range 2 in PLL enable sequenceAnder Conselvan de Oliveira
2016-12-02drm/i915/glk: Implement Geminilake DDI init sequenceAnder Conselvan de Oliveira
2016-12-02drm/i915/glk: Add power wells for GeminilakeAnder Conselvan de Oliveira
2016-12-02drm/i915/glk: Reuse broxton code for geminilakeAnder Conselvan de Oliveira
2016-11-24drm/i915: cleanup use of INSTR_CLIENT_MASKMatthew Auld
2016-11-23drm/i915: Use enum plane_id in VLV/CHV sprite codeVille Syrjälä
2016-11-22drm/i915: Enable i915 perf stream for Haswell OA unitRobert Bragg
2016-11-22drm/i915: rename OACONTROL GEN7_OACONTROLRobert Bragg
2016-11-16drm/i915/bxt: Broxton decoupled MMIOPraveen Paneri
2016-10-28drm/i915: Address broxton phy registers based on phy and channel numberAnder Conselvan de Oliveira
2016-10-28drm/i915: Create a struct to hold information about the broxton physAnder Conselvan de Oliveira
2016-10-28drm/i915: Move DPIO phy documentation section to intel_dpio_phy.cAnder Conselvan de Oliveira
2016-10-26drm/i915/audio: set proper N/M in modesetLibin Yang
2016-10-25drm/i915: Support for GuC interruptsSagar Arun Kamble
2016-10-24drm/i915/fbc: fix FBC_COMPRESSION_MASK on BDW+Paulo Zanoni
2016-10-14drm/i915: Make IS_HASWELL only take dev_privTvrtko Ursulin
2016-10-12drm/i915: Remove unused BSM_MASK causing warningJoonas Lahtinen
2016-10-11drm/i915/audio: add register macros for audio config N valueJani Nikula
2016-10-05drm/i915: Share the computation of ring size for RING_CTL registerChris Wilson
2016-09-21drm/i915: Try to print INSTDONE bits for all slice/subsliceBen Widawsky
2016-09-21drm/i915: Cleanup instdone collectionBen Widawsky
2016-09-15drm/i915: clarify PMINTRMSK/pm_intr_keep usageDave Gordon
2016-08-22drm/i915/skl: Add support for the SAGV, fix underrun hangsLyude
2016-08-22drm/i915/gen6+: Interpret mailbox error flagsLyude
2016-08-15drm/i915: Show RPS autotuning thresholds along with waitboostChris Wilson
2016-08-10drm/i915/lvds: Restore initial HW state during encoder enablingImre Deak
2016-08-10drm/i915: Merge TARGET_POWER_ON and PANEL_POWER_ON flag definitionsImre Deak
2016-08-10drm/i915: Merge the PPS register definitionsImre Deak
2016-08-04drm/i915: Fix use of engine->index for register offsetChris Wilson
2016-08-02drm/i915/gen9: Update i915_drpc_info debugfs for coarse pg & forcewake infoAkash Goel
2016-08-02drm/i915: Name the "iboost bit"Ville Syrjälä
2016-08-02drm/i915: Fix iboost setting for DDI with 4 lanes on SKLVille Syrjälä
2016-07-21drm/i915: rename macro parameter(ring) to (engine)Dave Gordon
2016-07-20drm/i915/gen9: Add WaDisableGatherAtSetShaderCommonSliceMika Kuoppala
2016-07-20drm/i915/gen9: Add WaInPlaceDecompressionHangMika Kuoppala
2016-07-01drm/i915/bxt: Fix sanity check for BIOS RC6 setupImre Deak
2016-06-17drm/i915: Make addressing mode bits in context descriptor configurableZhi Wang
2016-06-16Merge remote-tracking branch 'airlied/drm-next' into drm-intel-next-queuedDaniel Vetter
2016-06-14drm/i915/bxt: Add WaDisablePooledEuLoadBalancingFixarun.siluvery@linux.intel.com
2016-06-14drm/i915:bxt: Enable Pooled EU supportarun.siluvery@linux.intel.com
2016-06-13drm/i915/bxt: Sanitiy check the PHY lane power down statusImre Deak
2016-06-13drm/i915/bxt: Move DDI PHY enabling/disabling to the power well codeImre Deak
2016-06-13drm/i915/gen9: implement WaConextSwitchWithConcurrentTLBInvalidateTim Gore
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