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path: root/drivers/gpu/drm/i915/i915_reg.h
AgeCommit message (Expand)Author
2019-03-05drm/i915: Store the BIT(engine->id) as the engine's maskChris Wilson
2019-03-04drm/i915: Fix bit name in PP_STATUS registerLucas De Marchi
2019-02-26drm/i915: Add the missing HDMI gamut metadata packet stuffVille Syrjälä
2019-02-21drm/i915/icl: Drop redundant gamma mode maskUma Shankar
2019-02-20drm/i915: Extend skl+ crc sources with more planesVille Syrjälä
2019-02-14drm/i915: Include "ignore lines" in skl+ wm stateVille Syrjälä
2019-02-14Revert "drm/i915: W/A for underruns with WM1+ disabled on icl"Ville Syrjälä
2019-02-14drm/i915: Make MG PHY macros semantically consistentAditya Swarup
2019-02-14drm/i915: Make combo PHY DDI macro definitions consistent for ICL and CNLAditya Swarup
2019-02-13drm/i915: Assert that VED and ISP are power gatedVille Syrjälä
2019-02-13drm/i915: s/PUNIT_REG_DSPFREQ/PUNIT_REG_DSPSSPM/Ville Syrjälä
2019-02-13drm/i915/icl: Enable pipe output cscUma Shankar
2019-02-13drm/i915/icl: Enable ICL Pipe CSC blockUma Shankar
2019-02-13drm/i915/icl: Add icl pipe degamma and gamma supportUma Shankar
2019-02-08drm/i915: Track pipe csc enable in crtc stateVille Syrjälä
2019-02-08drm/i915: Populate gamma_mode for all platformsVille Syrjälä
2019-02-06drm/i915: Just use icl+ definition for PLANE_WM blocks fieldVille Syrjälä
2019-02-06drm/i915: Bump skl+ wm blocks to 11 bitsVille Syrjälä
2019-02-05drm/i915: W/A for underruns with WM1+ disabled on iclVille Syrjälä
2019-02-01drm/i915/icl: restore WaEnableFloatBlendOptimizationTalha Nassar
2019-01-30drm/i915: Force background color to black for gen9+ (v2)Matt Roper
2019-01-29drm/i915/icl: use tc_port in MG_PLL macrosLucas De Marchi
2019-01-25drm/i915/tv: Generate better pipe timings for TV encoderVille Syrjälä
2019-01-22drm/i915: Add PSR2 selective update status registers and bits definitionsJosé Roberto de Souza
2019-01-18drm/i915/dp: remove PANEL_POWER_OFF macro and its useJani Nikula
2019-01-17drm/i915: small isolated c99 types to kernel types switchJani Nikula
2019-01-15drm/i915/cnl: Fix CNL macros for Voltage Swing programmingAditya Swarup
2019-01-02drm/i915: always use INTEL_INFO() to access device infoJani Nikula
2019-01-02drm/i915/reg: abstract display_mmio_offset accessJani Nikula
2018-12-18drm/i915/icl: combo port vswing programming changes per BSPECClint Taylor
2018-12-13drm/i915/icl: Mind the SFC units when resetting VD or VEBox enginesOscar Mateo
2018-12-03drm/i915/icl: Define Panel power ctrl registerMadhav Chauhan
2018-12-03drm/i915/icl: Define missing bitfield for shortplug regMadhav Chauhan
2018-11-29i915/dp/fec: Configure the Forward Error Correction bits.Anusha Srivatsa
2018-11-29drm/i915/dp: Use the existing write_infoframe() for DSC PPS SDPsManasi Navare
2018-11-21drm/i915: Make CHICKEN_TRANS reg not depend on enum valueImre Deak
2018-11-21drm/i915: Make EDP PSR flags not depend on enum valuesImre Deak
2018-11-19Revert "drm/i915/perf: add a parameter to control the size of OA buffer"Joonas Lahtinen
2018-11-14drm/i915: Deduplicate register definition for GAMW_ECO_DEV_RW_IAMika Kuoppala
2018-11-13drm/i915: rename CNP_RAWCLK_FRAC to CNP_RAWCLK_DENPaulo Zanoni
2018-11-09drm/i915: Polish the skl+ plane keyval/msk/max register setupVille Syrjälä
2018-11-06drm/i915/icl: Define Plane Input CSC Coefficient RegistersUma Shankar
2018-11-02drm/i915/fia: FIA registers offset implementation.Anusha Srivatsa
2018-11-02drm/i915: also group device info array helper macros with othersJani Nikula
2018-11-02drm/i915: reorder and reindent the register choosing helper wrappersJani Nikula
2018-11-02drm/i915: define _MMIO_PLANE() in terms of _PLANE() not _MMIO_PIPE()Jani Nikula
2018-11-02drm/i915: remove palette_offsets from device info in favor of _PICK()Jani Nikula
2018-11-01drm/i915/icl: Fix DSS_CTL register namesAnusha Srivatsa
2018-11-01drm/i915/icl: WaAllowUMDToModifySamplerModeOscar Mateo
2018-11-01drm/i915/icl: Add WaEnable32PlaneModeRadhakrishna Sripada
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