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i915
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Age
Commit message (
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Author
2019-07-30
drm/i915/tgl: Add hpd interrupt handling
Lucas De Marchi
2019-07-30
drm/i915: use upstream version of header tests
Jani Nikula
2019-07-26
drm/i915/tgl: select correct bit for port select
Mahesh Kumar
2019-07-26
drm/i915/tgl: skip setting PORT_CL_DW12_* on initialization
Lucas De Marchi
2019-07-19
drm/i915/dsi: remove set but not used variable 'hfront_porch'
YueHaibing
2019-07-19
drm/i915: Remove set but not used variable 'src_y'
YueHaibing
2019-07-18
drm/i915/vbt: Fix VBT parsing for the PSR section
Dhinakaran Pandiyan
2019-07-18
drm/i915: Make sure cdclk is high enough for DP audio on VLV/CHV
Ville Syrjälä
2019-07-18
drm/i915/ehl: Use an id of 4 while accessing DPLL4's CR0 and CR1
Vivek Kasireddy
2019-07-15
drm/i915: Enable hotplug retry
José Roberto de Souza
2019-07-15
drm/i915: Add support for retrying hotplug
Imre Deak
2019-07-15
drm/i915/ehl: Map MCC pins based on PHY, not port
Matt Roper
2019-07-12
drm/i915/gt: Use intel_gt as the primary object for handling resets
Chris Wilson
2019-07-12
drm/i915: Add modular FIA
Anusha Srivatsa
2019-07-12
drm/i915/display: Drop kerneldoc for 'intel_atomic_commit'
Chris Wilson
2019-07-12
drm/i915: Skip SINK_COUNT read on CH7511
Ville Syrjälä
2019-07-12
drm/i915: Propagate "_remove" function name suffix down
Janusz Krzysztofik
2019-07-12
drm/i915: Replace "_load" with "_probe" consequently
Janusz Krzysztofik
2019-07-11
drm/i915/tgl: Update DPLL clock reference register
José Roberto de Souza
2019-07-11
drm/i915/tgl: Add DPLL registers
Lucas De Marchi
2019-07-11
drm/i915/tgl: Add vbt value mapping for DDC Bus pin
Mahesh Kumar
2019-07-11
drm/i915/tgl: port to ddc pin mapping
Lucas De Marchi
2019-07-11
drm/i915/tgl: Add gmbus gpio pin to port mapping
Mahesh Kumar
2019-07-11
drm/i915/gen12: MBUS B credit change
Rodrigo Vivi
2019-07-11
drm/i915/tgl: apply Display WA #1178 to fix type C dongles
Lucas De Marchi
2019-07-11
drm/i915/tgl: init ddi port A-C for Tiger Lake
Mahesh Kumar
2019-07-11
drm/i915/tgl: Add additional PHYs for Tiger Lake
Lucas De Marchi
2019-07-11
drm/i915/tgl: Add additional ports for Tiger Lake
Vandita Kulkarni
2019-07-11
drm/i915/tgl: Add pll manager
Vandita Kulkarni
2019-07-11
drm/i915/tgl: Add new pll ids
Vandita Kulkarni
2019-07-11
drm/i915/tgl: Add power well to support 4th pipe
Mika Kahola
2019-07-11
drm/i915/tgl: Add power well support
Imre Deak
2019-07-11
drm/i915/tgl: rename TRANSCODER_EDP_VDSC to use on transcoder A
José Roberto de Souza
2019-07-11
drm/i915: Add 4th pipe and transcoder
Lucas De Marchi
2019-07-11
drm/i915: Don't overestimate 4:2:0 link symbol clock
Ville Syrjälä
2019-07-11
drm/i915: Don't pass stack garbage to pcode in the second data register
Ville Syrjälä
2019-07-11
drm/i915: Use intel_ types in intel_atomic_commit()
Ville Syrjälä
2019-07-11
drm/i915: Use intel_ types in intel_{lock,modeset}_all_pipes()
Ville Syrjälä
2019-07-11
drm/i915: Polish intel_atomic_track_fbs()
Ville Syrjälä
2019-07-11
drm/i915: Polish intel_shared_dpll_swap_state()
Ville Syrjälä
2019-07-11
drm/i915: Simplify modeset_get_crtc_power_domains() arguments
Ville Syrjälä
2019-07-11
drm/i915: Use the "display core" power domain in vlv/chv set_cdclk()
Ville Syrjälä
2019-07-11
drm/i915/sdvo: Fix handling if zero hbuf size
Ville Syrjälä
2019-07-10
drm/i915/ehl: Enable DDI-D
Matt Roper
2019-07-10
drm/i915: Transition port type checks to phy checks
Matt Roper
2019-07-10
drm/i915/gen11: Convert combo PHY logic to use new 'enum phy' namespace
Matt Roper
2019-07-10
drm/i915/gen11: Program ICL_DPCLKA_CFGCR0 according to PHY
Matt Roper
2019-07-10
drm/i915/gen11: Start distinguishing 'phy' from 'port'
Matt Roper
2019-07-10
drm/i915: move intel_ddi_set_fia_lane_count to intel_tc.c
Lucas De Marchi
2019-07-10
drm/i915: fix include order in intel_tc.*
Lucas De Marchi
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