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path: root/drivers/gpu/drm/amd
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2018-02-19drm/amdgpu: implement vcn_v1_0_(dec|enc)_ring_emit_reg_wait v2Christian König
Add emit_reg_wait implementation for VCN v1. v2: cleanup the existing code as well Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Felix Kuehling <felix.kuehling@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-02-19drm/amdgpu: implement vce_v4_0_emit_reg_wait v2Christian König
Add emit_reg_wait implementation for VCE v4. v2: call new function directly from existing code Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Felix Kuehling <felix.kuehling@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-02-19drm/amdgpu: implement uvd_v7_0_(enc_|)ring_emit_reg_wait v2Christian König
Add emit_reg_wait implementation for UVD v7. v2: call new function directly from the existing code Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Felix Kuehling <felix.kuehling@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-02-19drm/amdgpu: implement sdma_v4_0_ring_emit_reg_waitChristian König
Add emit_reg_wait implementation for SDMA v4. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Felix Kuehling <felix.kuehling@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-02-19drm/amdgpu: implement gfx_v9_0_ring_emit_reg_waitChristian König
Implement emit_reg_wait for gfx v9. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Felix Kuehling <felix.kuehling@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-02-19drm/amdgpu: add new emit_reg_wait callbackChristian König
Allows us to wait for a register value/mask on a ring. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Felix Kuehling <felix.kuehling@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-02-19drm/amdgpu: fix DW estimation on VIChristian König
Forgot to update that during recent changes. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-02-19drm/amd/pp: Fix sysfs pp_dpm_pcie bug on CI/VIRex Zhu
when echo "01">pp_dpm_pcie the pcie dpm will fix in highest link speed. But user should expect auto speed between level 0 and level1 Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-02-19drm/amd/pp: Enable pp_set_power_profile_mode under manual modeRex Zhu
Only user enter manual performance mode, driver allow user configure the sclk/mclk dpm parameters through sysfs pp_power_profile_mode. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-02-19drm/amd/pp: Refine pp_dpm_force_clock_level functionsRex Zhu
Only when user set manual performance mode, driver enable pp_dpm_force_clock_level. so check the mode in pp_dpm_force_clock_level, and delete the same logic in callback functions. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-02-19drm/amd/pp: Delete debug info when set power_profile_modeRex Zhu
Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-02-19drm/amdgpu: limit the VM address space with older VCE FW versionsChristian König
Older VCE FW versions are buggy and can't work with 48bit address spaces. RFC: Should we limit the address space or just reject loading the older VCE firmware? Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-02-19drm: amd: Fix trailing semicolonsLuis de Bethencourt
The trailing semicolon is an empty statement that does no operation. Removing the two instances of them since they don't do anything. Signed-off-by: Luis de Bethencourt <luisbg@kernel.org> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-02-19drm/amdgpu: set DRIVER_ATOMIC flag earlyAlex Deucher
The atomic debugfs stuff gets created in drm_dev_alloc() but this gets called before we've enumerated all of our IPs, so move the DRIVER_ATOMIC flag setting to fix that. Since DRIVER_ATOMIC is a driver flag it's currently global to the driver so setting it affects all GPUs driven by the driver. Unfortunately, not all GPUs support atomic. Warn the user if that is the case. This is the same as our current behavior, but at least the atomic debugfs stuff gets created now. Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-02-19drm/amdgpu: remove DC special casing for KB/MLAlex Deucher
It seems to be working now. Bug: https://bugs.freedesktop.org/show_bug.cgi?id=102372 Reviewed-by: Mike Lothian <mike@fireburn.co.uk> Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-02-19drm/amdgpu: fill only the lower range with ATS entries v2Christian König
At least on x86-64 the upper range is purely used by the kernel, avoid creating any ATS mappings there as security precaution and to allow proper page fault reporting in the upper range. v2: remove unused variable Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-02-19drm/amdgpu: revert "Add support for filling a buffer with 64 bit value"Christian König
This reverts commit 7bdc53f925af085ffa0580f10489f82b36cc2f1c and commit 330df03b3abf944f8f5180f2abc61367749984c0. Neither are needed any more. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-02-19drm/amdgpu: revert "Add a parameter to amdgpu_bo_create()"Christian König
This reverts commit 2046d46db9166bddc84778f0b3477f6d1e9068ea. Not needed any more. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-02-19drm/amdgpu: drop root shadow syncChristian König
Completely pointless, it is the same reservation object as the root PD anyway. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Roger He <Hongbo.He@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-02-19drm/amdgpu: revert "drm/amdgpu: use AMDGPU_GEM_CREATE_VRAM_CLEARED for VM ↵Christian König
PD/PTs" v2 Using the standard clear turned out to be to inflexible. First of all it is executed on the system queue, together with buffer moves instead on the per VM queue. And second we need to fill in the page tables with more than just zero. We keep the new functionality of initializing the PDEs/PTEs with ATC routing entries intact. v2: update commit message. Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-02-19drm/amdgpu: fix vcn_v1_0_dec_ring_emit_wregChristian König
That got mixed up with the encode ring function. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-02-19drm/amdgpu/pm: rework the hwmon visibility settingsAlex Deucher
Previously we just always exposed everything for asics supported by powerplay. Make it a bit more fine grained. In practice this shouldn't change anything. Acked-by: Christian König <christian.koenig@amd.com> Reviewed-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-02-19drm/amdgpu/pp: remove the get_temperature APIAlex Deucher
This is also supported with the read_sensor API and there were no more users of the get_temperature API. Acked-by: Christian König <christian.koenig@amd.com> Reviewed-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-02-19drm/amdgpu/pm: use read_sensor API to get temperatureAlex Deucher
Rather than using the amdgpu_dpm_get_temperature. Both provide access to the temperature. Acked-by: Christian König <christian.koenig@amd.com> Reviewed-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-02-19drm/amdgpu/pm: report gpu average power via hwmon APIAlex Deucher
Expose power via hwmon. Acked-by: Christian König <christian.koenig@amd.com> Reviewed-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-02-19drm/amdgpu/pm: report gpu voltages via hwmon APIAlex Deucher
Expose vddgfx and vddnb via hwmon. Acked-by: Christian König <christian.koenig@amd.com> Reviewed-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-02-19drm/amdgpu/pm: handle fan properly when card is powered downAlex Deucher
Return an error if the user tried to check or set the fan parameters while the card is powered down (e.g., on a PX/HG system for example). This makes the fan consistent with the temperature stuff. Acked-by: Christian König <christian.koenig@amd.com> Reviewed-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-02-19drm/amdgpu: move static CSA address to top of address space v2Christian König
Move the CSA area to the top of the VA space to avoid clashing with HMM/ATC in the lower range on GFX9. v2: wrong sign noticed by Roger, rebase on CSA_VADDR cleanup, handle VA hole on GFX9 as well. Signed-off-by: Christian König <christian.koenig@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Acked-by: Monk Liu <monk.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-02-19drm/amd/pp: Delete unnecessary function argumentRex Zhu
in populate_single_graphic_level for smu7 Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-02-19drm/amd/pp: Add struct profile_mode_setting for smu7Rex Zhu
Move configurable profiling parameters to struct profile_mode_setting and initialize current_profile_setting. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-02-19drm/amd/pp: Delete dead code in powerplayRex Zhu
As not support per DPM level optimization, so delete activity_target array. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-02-19drm/amd/pp: Change activity_target for performance optimization on PolarisRex Zhu
And not support perDPM level optimization on Polaris, so delete sclk activity_target array. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-02-19drm/amd/display: Remove timer handler.Andrey Grodzovsky
Dead code, looks obsolete. Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com> Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-02-19drm/amd/display: Remove unsued mutex and spinlock.Andrey Grodzovsky
They seem to be obsolete. Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com> Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-02-19drm/amd/display: Fix warning about misaligned codeHarry Wentland
Signed-off-by: Harry Wentland <harry.wentland@amd.com> Reviewed-by: Charlene Liu <charlene.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-02-19drm/amd/display: Add temporary delay on disconnect patchJohn Barberiz
- Sequencing bug of not resetting delay on disconnect to default values Signed-off-by: John Barberiz <jbarberi@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-02-19drm/amd/display: Remove unnecessary register programmingMikita Lipski
Remove aux engine register programming,when freeing the engine as it was a temporary workaround. Signed-off-by: Mikita Lipski <mikita.lipski@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-02-19drm/amd/display: Add temporary delay on disconnect patchJohn Barberiz
Signed-off-by: John Barberiz <jbarberi@amd.com> Reviewed-by: Jun Lei <Jun.Lei@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-02-19drm/amd/display: Fix unused variable compilation errorLeo (Sunpeng) Li
Fix: drivers/gpu/drm/amd/amdgpu/../dal-dev/dc/dce110/dce110_hw_sequencer.c: In function ‘dce110_blank_stream’: drivers/gpu/drm/amd/amdgpu/../dal-dev/dc/dce110/dce110_hw_sequencer.c:1008:31: error: unused variable ‘params’ [-Werror=unused-variable] struct encoder_unblank_param params = { { 0 } }; Signed-off-by: Leo (Sunpeng) Li <sunpeng.li@amd.com> Reviewed-by: Wesley Chalmers <Wesley.Chalmers@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-02-19drm/amd/display: eDP sequence BL off first then DP blank.Charlene Liu
Signed-off-by: Charlene Liu <charlene.liu@amd.com> Reviewed-by: Anthony Koo <Anthony.Koo@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-02-19drm/amd/display: Add debug flag for p010_mpo_supportGeling Li
Signed-off-by: Geling Li <geling.li@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-02-19drm/amd/display: Force full update on pixel_format_changeKrunoslav Kovac
Signed-off-by: Krunoslav Kovac <Krunoslav.Kovac@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-02-19drm/amd/display: dal 3.1.29Tony Cheng
Signed-off-by: Tony Cheng <tony.cheng@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-02-19drm/amd/display: dpms off mute az audio endpoint only.Charlene Liu
Signed-off-by: Charlene Liu <charlene.liu@amd.com> Reviewed-by: Krunoslav Kovac <Krunoslav.Kovac@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-02-19drm/amd/display: revert to hacking bounding box for pipe splitDmytro Laktyushkin
Directly editing pipe config outside of formula is error prone and results in higher clocks being used when splitting. For this reason we reverted to using bounding box hacking to split. Since sometimes this erroneusly results in higher dpm being required we unhack the bounding box and recalculate to allow dpm0 is possible. Side effect is we will lose some stutter efficiency in non dpm0 cases. This is not a big concern since increased stutter efficiency saves an order of magnitude less power than lower dpm. Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-02-19drm/amd/display: disable az_clock_gating for endpoint register access onlyCharlene Liu
Signed-off-by: Charlene Liu <charlene.liu@amd.com> Reviewed-by: Krunoslav Kovac <Krunoslav.Kovac@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-02-19drm/amd/display: Define dpp1_set_cursor_position in headerArun Pandey
Signed-off-by: Arun Pandey <Arun.Pandey@amd.com> Reviewed-by: Charlene Liu <Charlene.Liu@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-02-19drm/amd/display: fix backlight not off at resume from S4Charlene Liu
Signed-off-by: Charlene Liu <charlene.liu@amd.com> Reviewed-by: Krunoslav Kovac <Krunoslav.Kovac@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-02-19drm/amd/display: Add timing generator count to resource pool.Yongqiang Sun
Use tg count in resource pool for further reference. Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-02-19drm/amd/display: Synchronize update plane addr for freesyncSivapiriyanKumarasamy
Lock top_pipe when doing update plane addr for split pipe freesync case Signed-off-by: SivapiriyanKumarasamy <sivapiriyan.kumarasamy@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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