Age | Commit message (Expand) | Author |
---|---|---|
2016-11-29 | fpga zynq: Fix incorrect ISR state on bootup | Jason Gunthorpe |
2016-11-29 | fpga zynq: Remove priv->dev | Jason Gunthorpe |
2016-11-29 | fpga zynq: Add missing \n to messages | Jason Gunthorpe |
2016-11-10 | fpga-mgr: add fpga image information struct | Alan Tull |
2015-10-23 | fpga: zynq-fpga: Fix issue with drvdata being overwritten. | Moritz Fischer |
2015-10-23 | fpga: zynq-fpga: Change fw format to handle bin instead of bit. | Moritz Fischer |
2015-10-23 | fpga: zynq-fpga: Fix unbalanced clock handling | Moritz Fischer |
2015-10-17 | fpga manager: Adding FPGA Manager support for Xilinx Zynq 7000 | Moritz Fischer |