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path: root/drivers/clk
AgeCommit message (Expand)Author
2020-06-09clk: mediatek: Remove ifr{0,1}_cfg_regs structuresStephen Boyd
2020-06-09clk: baikal-t1: remove redundant assignment to variable 'divider'Colin Ian King
2020-06-09clk: baikal-t1: fix spelling mistake "Uncompatible" -> "Incompatible"Colin Ian King
2020-06-01Merge branches 'clk-vc5', 'clk-hsdk', 'clk-mediatek' and 'clk-baikal' into cl...Stephen Boyd
2020-06-01Merge branches 'clk-mmp', 'clk-intel', 'clk-ingenic', 'clk-qcom' and 'clk-sil...Stephen Boyd
2020-06-01Merge branches 'clk-unisoc', 'clk-trivial', 'clk-bcm', 'clk-st' and 'clk-ast2...Stephen Boyd
2020-06-01Merge branches 'clk-tegra', 'clk-imx', 'clk-zynq', 'clk-socfpga', 'clk-at91' ...Stephen Boyd
2020-06-01Merge branches 'clk-selectable', 'clk-amlogic', 'clk-renesas', 'clk-samsung' ...Stephen Boyd
2020-05-30clk: vc5: Add support for IDT VersaClock 5P49V6965Adam Ford
2020-05-30clk: Add Baikal-T1 CCU Dividers driverSerge Semin
2020-05-30clk: Add Baikal-T1 CCU PLLs driverSerge Semin
2020-05-28clk: mediatek: assign the initial value to clk_init_data of mtk_muxWeiyi Lu
2020-05-28clk: mediatek: Add MT6765 clock supportOwen Chen
2020-05-28CLK: HSDK: CGU: add support for 148.5MHz clockEugeniy Paltsev
2020-05-28CLK: HSDK: CGU: support PLL bypassingEugeniy Paltsev
2020-05-28CLK: HSDK: CGU: check if PLL is bypassed firstEugeniy Paltsev
2020-05-28clk: clk-si5341: Add support for the Si5345 seriesMike Looijmans
2020-05-28clk: qcom: Add missing msm8998 ufs_unipro_core_clk_srcJeffrey Hugo
2020-05-28clk: ingenic: Mark ingenic_tcu_of_match as __maybe_unusedStephen Boyd
2020-05-28clk: X1000: Add FIXDIV for SSI clock of X1000.周琰杰 (Zhou Yanjie)
2020-05-28clk: Ingenic: Add CGU driver for X1830.周琰杰 (Zhou Yanjie)
2020-05-28clk: Ingenic: Adjust cgu code to make it compatible with X1830.周琰杰 (Zhou Yanjie)
2020-05-28clk: Ingenic: Remove unnecessary spinlock when reading registers.周琰杰 (Zhou Yanjie)
2020-05-28clk: intel: remove redundant initialization of variable rate64Colin Ian King
2020-05-27clk: mmp2: Add audio clock controller driverLubomir Rintel
2020-05-27clk: mmp2: Add support for power islandsLubomir Rintel
2020-05-27clk: mmp2: Add the audio clockLubomir Rintel
2020-05-27clk: mmp2: Add the I2S clocksLubomir Rintel
2020-05-27clk: mmp2: Rename mmp2_pll_init() to mmp2_main_clk_init()Lubomir Rintel
2020-05-27clk: mmp2: Move thermal register defines up a bitLubomir Rintel
2020-05-27clk: mmp: frac: Allow setting bits other than the numerator/denominatorLubomir Rintel
2020-05-27clk: mmp: frac: Do not lose last 4 digits of precisionLubomir Rintel
2020-05-27clk: ast2600: Fix AHB clock divider for A1Eddie James
2020-05-27clk: clk-flexgen: fix clock-critical handlingAlain Volmat
2020-05-27clk: bcm2835: Constify struct debugfs_reg32Rikard Falkeborn
2020-05-26clk: sprd: add mipi_csi_xx gate clocksChunyan Zhang
2020-05-26clk: sprd: check its parent status before reading gate clockChunyan Zhang
2020-05-26clk: versatile: remove redundant assignment to pointer clkColin Ian King
2020-05-26clk: ti: dra7: remove two unused symbolsJason Yan
2020-05-26clk: at91: allow setting all PMC clock parents via DTMichał Mirosław
2020-05-26clk: at91: allow setting PCKx parent via DTMichał Mirosław
2020-05-26clk: at91: optimize pmc data allocationMichał Mirosław
2020-05-26clk: at91: pmc: decrement node's refcountClaudiu Beznea
2020-05-26clk: at91: pmc: do not continue if compatible not locatedClaudiu Beznea
2020-05-26clk: at91: Add peripheral clock for PTCCodrin Ciubotariu
2020-05-26clk: sprd: return correct type of value for _sprd_pll_recalc_rateChunyan Zhang
2020-05-26clk: sprd: mark the local clock symbols staticChunyan Zhang
2020-05-26clk: intel: Add CGU clock driver for a new SoCRahul Tanwar
2020-05-26clk: qcom: gcc-msm8939: Add MSM8939 Generic Clock ControllerBryan O'Donoghue
2020-05-26clk: qcom: gcc: Add support for Secure control source clockTaniya Das