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path: root/drivers/clk
AgeCommit message (Expand)Author
2017-04-12clk: imx: correct uart4_serial clock name in driver for i.MX6ULRobin van der Gracht
2017-04-12clk: zte: Mark pll config tables as constStephen Boyd
2017-04-12clk: zte: add pll_vga clock for zx296718Shawn Guo
2017-04-12clk: zte: pd_bit is not 0 on zx296718Shawn Guo
2017-04-12clk: zte: set CLK_SET_RATE_PARENT for a few zx296718 clocksShawn Guo
2017-04-12clk: imx: clk-imx6ul: The i.mx6ul has no aips_tz3 clockRobin van der Gracht
2017-04-12Merge tag 'tegra-for-4.12-clk' of git://git.kernel.org/pub/scm/linux/kernel/g...Michael Turquette
2017-04-12cs-2000-cp: keep Reserved bit on each registerKuninori Morimoto
2017-04-12clk: qcom: msm8996: Fix the vfe1 powerdomain nameRajendra Nayak
2017-04-12clk: stm32f4: fix timeout management for pll and ready gateGabriel Fernandez
2017-04-12clk: iproc: Remove redundant checkRay Jui
2017-04-12Merge tag 'v4.12-rockchip-clk1' of git://git.kernel.org/pub/scm/linux/kernel/...Michael Turquette
2017-04-12Merge tag 'clk-renesas-for-v4.12-tag2' of git://git.kernel.org/pub/scm/linux/...Michael Turquette
2017-04-12Merge branch 'clk-fixes' into clk-nextStephen Boyd
2017-04-12clk: stm32f4: fix: exclude values 0 and 1 for PLLQGabriel Fernandez
2017-04-12Merge branch 'for-4.12-ti-clk-cleanups' of https://github.com/t-kristo/linux-...Stephen Boyd
2017-04-12clk: hi6220: add debug APB clockLeo Yan
2017-04-04clk: tegra: Don't reset PLL-CX if it is already enabledJon Hunter
2017-04-04clk: tegra: Add missing Tegra210 clocksPeter De Schrijver
2017-04-04clk: tegra: Propagate clk_out_x rate to parentAlex Frid
2017-03-30clk: renesas: rcar-gen3-cpg: Add support for RCLK on R-Car H3 ES2.0Geert Uytterhoeven
2017-03-30clk: renesas: r8a7795: Add support for R-Car H3 ES2.0Geert Uytterhoeven
2017-03-30clk: renesas: cpg-mssr: Add support for fixing up clock tablesGeert Uytterhoeven
2017-03-23Merge tag 'sunxi-clk-fixes-for-4.11' of https://git.kernel.org/pub/scm/linux/...Stephen Boyd
2017-03-22clk: rockchip: add pll_wait_lock for pll_enableElaine Zhang
2017-03-22clk: rockchip: rename RK1108 to RV1108Andy Yan
2017-03-21clk: renesas: rcar-gen3: Add workaround for PLL0/2/4 errata on H3 ES1.0Geert Uytterhoeven
2017-03-21clk: renesas: rcar-gen3-cpg: Pass mode pins to rcar_gen3_cpg_init()Geert Uytterhoeven
2017-03-21clk: renesas: r8a7796: Reformat core clock tableGeert Uytterhoeven
2017-03-21clk: renesas: r8a7795: Reformat core clock tableGeert Uytterhoeven
2017-03-21clk: renesas: r8a7796: Correct name of watchdog clockGeert Uytterhoeven
2017-03-21clk: renesas: r8a7795: Correct name of watchdog clockGeert Uytterhoeven
2017-03-21clk: renesas: r8a7795: Correct parent clock and sort order for Audio DMACsGeert Uytterhoeven
2017-03-20clk: tegra: Fix build warnings on Tegra20/Tegra30Thierry Reding
2017-03-20clk: tegra: Mark TEGRA210_CLK_DBGAPB as always onPeter De Schrijver
2017-03-20clk: tegra: Add SATA seq input controlPeter De Schrijver
2017-03-20clk: tegra: Add Tegra210 special resetsPeter De Schrijver
2017-03-20clk: tegra: Rework pll_uPeter De Schrijver
2017-03-20clk: tegra: Implement reset control resetMikko Perttunen
2017-03-20clk: tegra: Fix disable unused for clocks sharing enable bitPeter De Schrijver
2017-03-20clk: tegra: Handle UTMIPLL IDDQPeter De Schrijver
2017-03-20clk: tegra: Add aclkPeter De Schrijver
2017-03-20clk: tegra: Add super clock mux/dividerPeter De Schrijver
2017-03-20clk: tegra: Define Tegra210 DMIC clocksPeter De Schrijver
2017-03-20clk: tegra: Fix constness for peripheral clocksPeter De Schrijver
2017-03-20clk: tegra: Define Tegra210 DMIC sync clocksPeter De Schrijver
2017-03-20clk: tegra: Add CEC clockPeter De Schrijver
2017-03-20clk: tegra: Fix type for m fieldPeter De Schrijver
2017-03-20clk: tegra: Correct tegra210_pll_fixed_mdiv_cfg rate calculationPeter De Schrijver
2017-03-20clk: tegra: Don't warn for PLL defaults unnecessarilyPeter De Schrijver