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path: root/drivers/clk/tegra
AgeCommit message (Expand)Author
2021-03-24clk: tegra: Don't enable PLLE HW sequencer at initJC Kuo
2021-03-24clk: tegra: Add PLLE HW power sequencer controlJC Kuo
2021-02-22Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cl...Linus Torvalds
2021-02-20Merge tag 'arm-drivers-v5.12' of git://git.kernel.org/pub/scm/linux/kernel/gi...Linus Torvalds
2021-02-11clk: tegra: cvb: Provide missing description for 'tegra_cvb_add_opp_table()'s...Lee Jones
2021-02-11clk: tegra: clk-tegra30: Remove unused variable 'reg'Lee Jones
2021-01-12clk: tegra30: Add hda clock default rates to clock driverPeter Geis
2021-01-05memory: tegra124-emc: Make driver modularDmitry Osipenko
2020-12-21Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cl...Linus Torvalds
2020-12-10clk: tegra: Fix duplicated SE clock entryDmitry Osipenko
2020-11-26clk: tegra: bpmp: Clamp clock rates on requestsSivaram Nair
2020-11-20clk: tegra: Do not return 0 on failureNicolin Chen
2020-11-06clk: tegra: Export Tegra20 EMC kernel symbolsDmitry Osipenko
2020-10-22Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cl...Linus Torvalds
2020-09-23clk: tegra: Drop !provider check in tegra210_clk_emc_set_rate()Stephen Boyd
2020-09-21clk: tegra: Fix missing prototype for tegra210_clk_register_emc()Thierry Reding
2020-09-21clk: tegra: Always program PLL_E when enabledThierry Reding
2020-09-21clk: tegra: Capitalization fixesThierry Reding
2020-07-27clk: tegra: pll: Improve PLLM enable-state detectionDmitry Osipenko
2020-06-10Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cl...Linus Torvalds
2020-05-12clk: tegra: Fix initial rate for pll_a on Tegra124Thierry Reding
2020-05-12clk: tegra: Add Tegra210 CSI TPG clock gateSowjanya Komatineni
2020-05-12clk: tegra30: Use custom CCLK implementationDmitry Osipenko
2020-05-12clk: tegra20: Use custom CCLK implementationDmitry Osipenko
2020-05-12clk: tegra: cclk: Add helpers for handling PLLX rate changesDmitry Osipenko
2020-05-12clk: tegra: pll: Add pre/post rate-change hooksDmitry Osipenko
2020-05-12clk: tegra: Add custom CCLK implementationDmitry Osipenko
2020-05-12clk: tegra: Remove the old emc_mux clock for Tegra210Joseph Lo
2020-05-12clk: tegra: Implement Tegra210 EMC clockJoseph Lo
2020-05-12clk: tegra: Export functions for EMC clock scalingJoseph Lo
2020-05-12clk: tegra: Add PLLP_UD and PLLMB_UD for Tegra210Joseph Lo
2020-05-12clk: tegra: Rename Tegra124 EMC clock source fileThierry Reding
2020-03-24clk: tegra: Use NULL for pointer initializationStephen Boyd
2020-03-12clk: tegra: Remove audio clocks configuration from clock driverSowjanya Komatineni
2020-03-12clk: tegra: Remove tegra_pmc_clk_init along with clk idsSowjanya Komatineni
2020-03-12clk: tegra: Remove CLK_M_DIV fixed clocksSowjanya Komatineni
2020-03-12clk: tegra: Fix Tegra PMC clock out parentsSowjanya Komatineni
2020-03-12clk: tegra: Add Tegra OSC to clock lookupSowjanya Komatineni
2020-03-12clk: tegra: Add support for OSC_DIV fixed clocksSowjanya Komatineni
2020-01-31Merge branches 'clk-imx', 'clk-ti', 'clk-xilinx', 'clk-nvidia', 'clk-qcom', '...Stephen Boyd
2020-01-10clk: tegra20/30: Explicitly set parent clock for Video DecoderDmitry Osipenko
2020-01-10clk: tegra20/30: Don't pre-initialize displays parent clockDmitry Osipenko
2020-01-10clk: tegra: divider: Check UART's divider enable-bit state on rate's recalcul...Dmitry Osipenko
2020-01-10clk: tegra: clk-dfll: Remove call to pm_runtime_irq_safe()Sowjanya Komatineni
2020-01-08clk: tegra: Mark fuse clock as criticalStephen Warren
2019-12-24clk: tegra: Fix double-free in tegra_clk_init()Dmitry Osipenko
2019-11-13clk: tegra: Use match_string() helper to simplify the codeYueHaibing
2019-11-11clk: tegra: Fix build error without CONFIG_PM_SLEEPYueHaibing
2019-11-11clk: tegra: Optimize PLLX restore on Tegra20/30Dmitry Osipenko
2019-11-11clk: tegra: Add suspend and resume support on Tegra210Sowjanya Komatineni