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path: root/drivers/clk/tegra/clk-tegra124-dfll-fcpu.c
AgeCommit message (Expand)Author
2019-11-11clk: tegra: clk-dfll: Add suspend and resume supportSowjanya Komatineni
2019-05-30treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 174Thomas Gleixner
2019-02-18clk: tegra: dfll: Make symbol 'tegra210_cpu_cvb_tables' staticWei Yongjun
2019-02-15Merge tag 'tegra-for-5.1-clk' of git://git.kernel.org/pub/scm/linux/kernel/gi...Arnd Bergmann
2019-02-06clk: tegra: dfll: add CVB tables for Tegra210Joseph Lo
2019-02-06clk: tegra: dfll: CVB calculation alignment with the regulatorJoseph Lo
2019-02-06clk: tegra: dfll: registration for multiple SoCsPeter De Schrijver
2019-01-09clk: tegra: dfll: Fix a potential Oop in remove()Dan Carpenter
2017-11-01clk: tegra: dfll: Fix drvdata overwriting issueNicolin Chen
2016-11-10clk: tegra: dfll: Use builtin_platform_driver to simplify the codeWei Yongjun
2016-11-04clk: tegra: make clk-tegra124-dfll-fcpu explicitly non-modularPaul Gortmaker
2016-04-28clk: tegra: dfll: Reformat CVB frequency tableThierry Reding
2016-04-28clk: tegra: dfll: Properly clean up on failure and removalThierry Reding
2016-04-28clk: tegra: dfll: Make code more comprehensibleThierry Reding
2016-04-28clk: tegra: dfll: Reference CVB table instead of copying dataThierry Reding
2015-07-16clk: tegra: Add Tegra124 DFLL clocksource platform driverTuomas Tynkkynen
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