Age | Commit message (Expand) | Author |
---|---|---|
2020-01-10 | clk: tegra: divider: Check UART's divider enable-bit state on rate's recalcul... | Dmitry Osipenko |
2019-11-11 | clk: tegra: divider: Save and restore divider rate | Sowjanya Komatineni |
2019-05-30 | treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 201 | Thomas Gleixner |
2019-04-25 | clk: tegra: divider: Mark Memory Controller clock as read-only | Dmitry Osipenko |
2018-08-14 | Merge branches 'clk-imx6-ocram', 'clk-missing-put', 'clk-tegra-sdmmc-jitter',... | Stephen Boyd |
2018-07-25 | clk: tegra: Refactor fractional divider calculation | Peter De Schrijver |
2018-07-08 | clk: tegra: Mark Memory Controller clock as critical | Dmitry Osipenko |
2015-11-16 | tegra/clk-divider: fix wrong do_div() usage | Nicolas Pitre |
2015-07-20 | clk: tegra: Properly include clk.h | Stephen Boyd |
2014-11-26 | clk: tegra: Implement memory-controller clock | Thierry Reding |
2014-02-17 | clk: tegra: use max divider if divider overflows | Andrew Bresticker |
2013-01-28 | clk: tegra: add Tegra specific clocks | Prashant Gaikwad |