summaryrefslogtreecommitdiff
path: root/drivers/clk/sunxi
AgeCommit message (Expand)Author
2014-03-19clk: sunxi: fix thinko in commentEmilio López
2014-03-19clk: sunxi: fix some calculationsEmilio López
2014-03-19clk: sunxi: fix A20 PLL4 calculationEmilio López
2014-02-18clk: sunxi: Add new clock compatiblesMaxime Ripard
2014-02-18clk: sunxi: Add Allwinner A20/A31 GMAC clock unitChen-Yu Tsai
2014-02-18clk: sunxi: Add support for PLL6 on the A31Maxime Ripard
2014-02-18clk: sunxi: Add USB clock register defintionsRoman Byshko
2014-02-18clk: sunxi: Add support for USB clock-register reset bitsHans de Goede
2014-02-03clk: sunxi: get divs parent clock name from parent factor clockChen-Yu Tsai
2014-02-03clk: sunxi: add names for pll5, pll6 parent clocks to factors_dataChen-Yu Tsai
2014-02-03clk: sunxi: add clock-output-names dt property supportChen-Yu Tsai
2014-01-27clk: sunxi: fix overflow when setting up divided factorsEmilio López
2013-12-28clk: sunxi: Allwinner A20 output clock supportChen-Yu Tsai
2013-12-28clk: sunxi: support better factor DT nodesEmilio López
2013-12-28clk: sunxi: mod0 supportEmilio López
2013-12-28clk: sunxi: add PLL5 and PLL6 supportEmilio López
2013-12-28clk: sunxi: make factors_clk_setup return the clock it registersEmilio López
2013-12-28clk: sunxi: add gating support to PLL1Emilio López
2013-12-28clk: sunxi: clean the magic number of mux parentsEmilio López
2013-12-28clk: sunxi: register factors clocks behind compositeEmilio López
2013-12-01Merge tag 'sunxi-clk-for-3.13' of https://github.com/mripard/linux into clk-n...Mike Turquette
2013-11-10drivers: clk: sunxi: Fix memory leakage in clk-sunxi.cVictor N. Ramos Mello
2013-11-10clk: sunxi: protect core clocks from accidental shutdownEmilio López
2013-11-10clk: sunxi: factors: clear variables before using themEmilio López
2013-11-10clk: sunxi: factors: fix off-by-one masksEmilio López
2013-09-29clk: sunxi: declare OF clock providerSebastian Hesselbarth
2013-08-27clk: sunxi: Fix incorrect placement of __initconstSachin Kamat
2013-08-26clk: sunxi: Add Allwinner A20 gatesMaxime Ripard
2013-08-26clk: sunxi: Add A31 clocks supportMaxime Ripard
2013-08-26clk: sunxi: Allow to specify the divider width from the dividers dataMaxime Ripard
2013-08-26clk: sunxi: Rename the structure to prepare the addition of sun6iMaxime Ripard
2013-08-26clk: sunxi: fix initialization of basic clocksEmilio López
2013-08-26clk: sunxi: Add A10s gatesMaxime Ripard
2013-08-19clk: add CLK_SET_RATE_NO_REPARENT flagJames Hogan
2013-08-08clk: sunxi: Fix checking return value of clk_register_[composite|factors]Axel Lin
2013-05-29clk: sunxi: "cpu_data" is defined in header files of some architecturesGiacomo A. Catenazzi
2013-05-28clk: sun5i: Add compatibles for Allwinner A13Maxime Ripard
2013-04-12clk: sunxi: Unify oscillator clockEmilio López
2013-04-04clk: sunxi: drop an unnecesary kmallocEmilio López
2013-04-04clk: sunxi: drop CLK_IGNORE_UNUSEDEmilio López
2013-04-04clk: sunxi: Add support for AXI, AHB, APB0 and APB1 gatesEmilio López
2013-03-27clk: sunxi: rename compatible stringsEmilio López
2013-03-27clk: arm: sunxi: Add a new clock driver for sunxi SOCsEmilio López
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-18 10:34:15 +0000