Age | Commit message (Expand) | Author |
---|---|---|
2019-10-29 | clk: sunxi-ng: a80: fix the zero'ing of bits 16 and 18 | Colin Ian King |
2019-06-05 | treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 282 | Thomas Gleixner |
2019-05-15 | clk: Remove io.h from clk-provider.h | Stephen Boyd |
2017-04-13 | clk: sunxi-ng: a80: Fix audio PLL comment not matching actual code | Chen-Yu Tsai |
2017-04-05 | clk: sunxi-ng: a80: Remodel CPU cluster PLLs as N-type multiplier clocks | Chen-Yu Tsai |
2017-01-30 | clk: sunxi-ng: Add A80 CCU | Chen-Yu Tsai |