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path: root/drivers/clk/sunxi-ng/ccu-sun50i-h6.c
AgeCommit message (Expand)Author
2021-01-20clk: sunxi-ng: h6: Fix clock divider range on some clocksAndre Przywara
2021-01-06clk: sunxi-ng: h6: Fix CEC clockAndre Przywara
2019-10-02clk: sunxi-ng: h6: Allow GPU to change parent rateJernej Skrabec
2019-09-30clk: sunxi-ng: h6: Use sigma-delta modulation for audio PLLJernej Skrabec
2019-08-21clk: sunxi-ng: h6: Allow I2S to change parent rateJernej Skrabec
2019-06-22clk: sunxi-ng: h6: Use local parent references for CLK_FIXED_FACTORChen-Yu Tsai
2019-05-15clk: Remove io.h from clk-provider.hStephen Boyd
2019-04-04clk: sunxi-ng: h6: Allow video & vpu clocks to change parent rateJernej Skrabec
2019-04-03clk: sunxi-ng: h6: Preset hdmi-cec clock parentJernej Skrabec
2019-03-18clk: sunxi-ng: Allow DE clock to set parent rateJernej Skrabec
2018-11-05clk: sunxi-ng: h6: Set video PLLs limitsJernej Skrabec
2018-11-05clk: sunxi-ng: sun50i: h6: Fix MMC clock mux widthJagan Teki
2018-09-05clk: sunxi-ng: sun50i: h6: Add 2x fixed post-divider to MMC module clocksIcenowy Zheng
2018-08-27clk: sunxi-ng: h6: fix PWM gate/reset offsetRongyi Chen
2018-08-27clk: sunxi-ng: h6: fix bus clocks' divider positionIcenowy Zheng
2018-03-21clk: sunxi-ng: add missing hdmi-slow clock for H6 CCUIcenowy Zheng
2018-03-18clk: sunxi-ng: add support for the Allwinner H6 CCUIcenowy Zheng