| Age | Commit message (Expand) | Author |
|---|---|---|
| 2012-11-21 | CLK: SPEAr: Remove unused dummy apb_pclk | Vipul Kumar Samar |
| 2012-11-21 | CLK: SPEAr: Update clock rate table | Deepak Sikri |
| 2012-11-21 | CLK: SPEAr: Add missing clocks | Vipul Kumar Samar |
| 2012-11-21 | CLK: SPEAr: Set CLK_SET_RATE_PARENT for few clocks | Vipul Kumar Samar |
| 2012-11-21 | CLK: SPEAr13xx: fix parent names of multiple clocks | Shiraz Hashim |
| 2012-11-21 | CLK: SPEAr13xx: Fix mux clock names | Shiraz Hashim |
| 2012-11-21 | CLK: SPEAr: Fix dev_id & con_id for multiple clocks | Rajeev Kumar |
| 2012-07-18 | Clk: SPEAr1340: Update sys clock parent array | Vipul Kumar Samar |
| 2012-07-18 | clk: SPEAr1340: Fix clk enable register for uart1 and i2c1. | Vipul Kumar Samar |
| 2012-07-18 | clk:spear1340:Fix: Rename clk ids within predefined limit | Vipul Kumar Samar |
| 2012-06-20 | Viresh has moved | Viresh Kumar |
| 2012-05-14 | SPEAr13xx: Add common clock framework support | Viresh Kumar |
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