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path: root/drivers/clk/socfpga/clk-s10.c
AgeCommit message (Expand)Author
2021-06-27clk: agilex/stratix10: fix bypass representationDinh Nguyen
2021-06-27clk: agilex/stratix10: remove noc_clkDinh Nguyen
2021-03-30clk: socfpga: Convert to s10/agilex/n5x to use clk_hwDinh Nguyen
2020-09-22clk: socfpga: stratix10: fix the divider for the emac_ptp_free_clkDinh Nguyen
2020-05-26clk: socfpga: stratix10: use new parent data schemeDinh Nguyen
2020-02-12clk: socfpga: stratix10: simplify parameter passingDinh Nguyen
2019-06-25clk: socfpga: stratix10: fix divider entry for the emac clocksDinh Nguyen
2019-06-25clk: socfpga: stratix10: add additional clocks needed for the NAND IPDinh Nguyen
2019-01-15clk: socfpga: stratix10: fix naming convention for the fixed-clocksDinh Nguyen
2018-07-06clk: socfpga: stratix10: fix the sdmmc_free_clk muxDinh Nguyen
2018-07-06clk: socfpga: stratix10: fix the parents of mpu_free_clkDinh Nguyen
2018-05-15clk: socfpga: stratix10: suppress unbinding platform's clock driverDinh Nguyen
2018-05-15clk: socfpga: stratix10: use platform driver APIsDinh Nguyen
2018-04-06clk: socfpga: stratix10: add clock driver for Stratix10 platformDinh Nguyen
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