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path: root/drivers/clk/meson/gxbb.c
AgeCommit message (Expand)Author
2017-08-01clk: meson: mpll: fix mpll0 fractional part ignoredJerome Brunet
2017-06-16Merge tag 'meson-clk-for-4.13-2' of git://github.com/BayLibre/clk-meson into ...Stephen Boyd
2017-06-16clk: meson: gxbb: add all clk81 parentsJerome Brunet
2017-06-02clk: meson-gxbb: Add const to some parent name arraysStephen Boyd
2017-05-29clk: meson-gxbb: Add EE 32K Clock for CECNeil Armstrong
2017-05-29clk: gxbb: remove CLK_IGNORE_UNUSED from clk81Jerome Brunet
2017-05-29clk: meson: gxbb: remove the "cpu_clk" from the GXBB and GXL driverMartin Blumenstingl
2017-04-07clk: meson: gxbb: add cts_i958 clockJerome Brunet
2017-04-07clk: meson: gxbb: add cts_mclk_i958Jerome Brunet
2017-04-07clk: meson: gxbb: add cts_amclkJerome Brunet
2017-04-07clk: meson: gxbb: protect against holes in the onecell_data arrayJerome Brunet
2017-04-04clk: meson-gxbb: Add GXL/GXM GP0 VariantNeil Armstrong
2017-04-04clk: meson-gxbb: Add GP0 PLL init parametersNeil Armstrong
2017-04-04clk: meson-gxbb: Add MALI clocksNeil Armstrong
2017-03-27clk: meson: gxbb: mpll: use rw operationJerome Brunet
2017-03-27clk: meson: mpll: add rw operationJerome Brunet
2017-03-27clk: gxbb: put dividers and muxes in tablesJerome Brunet
2017-03-27clk: meson: add missing const qualifiers on gate arraysJerome Brunet
2017-01-23clk: gxbb: add the SAR ADC clocks and expose themMartin Blumenstingl
2016-09-02Merge branch 'clk-meson-gxbb' into clk-nextMichael Turquette
2016-09-01gxbb: clk: Adjust MESON_GATE macro to be shared with meson8bAlexander Müller
2016-08-15Merge branch 'clk-meson-gxbb' into clk-nextStephen Boyd
2016-08-15clk: gxbb: add MMC gate clocks, and expose for DTKevin Hilman
2016-08-15clk: gxbb: use builtin_platform_driver to simplify the codeWei Yongjun
2016-07-06clk: meson: make gxbb explicitly non-modularPaul Gortmaker
2016-06-22clk: gxbb: add AmLogic GXBB clk controller driverMichael Turquette