Age | Commit message (Expand) | Author |
---|---|---|
2021-02-09 | clk: meson: axg: Remove MIPI enable clock gate | Remi Pommarel |
2020-11-23 | clk: meson: axg: add MIPI DSI Host clock | Neil Armstrong |
2020-11-23 | clk: meson: axg: add Video Clocks | Neil Armstrong |
2018-09-26 | clk: meson: clk-pll: remove od parameters | Jerome Brunet |
2018-07-09 | clk: meson: add gen_clk | Jerome Brunet |
2018-07-09 | clk: meson-axg: add clocks required by pcie driver | Yixun Lan |
2018-03-13 | clk: meson: add fdiv clock gates | Jerome Brunet |
2018-03-13 | clk: meson: add mpll pre-divider | Jerome Brunet |
2018-03-13 | clk: meson: axg: add hifi pll clock | Jerome Brunet |
2018-03-13 | clk: meson: split divider and gate part of mpll | Jerome Brunet |
2017-12-14 | clk: meson-axg: add clock controller drivers | Qiufang Dai |