| Age | Commit message (Expand) | Author |
|---|---|---|
| 2020-05-28 | clk: Ingenic: Adjust cgu code to make it compatible with X1830. | 周琰杰 (Zhou Yanjie) |
| 2019-08-12 | clk: ingenic: Use CLK_OF_DECLARE_DRIVER macro | Paul Cercueil |
| 2019-06-25 | clk: ingenic: Handle setting the Low-Power Mode bit | Paul Cercueil |
| 2019-06-07 | clk: ingenic/jz4725b: Fix "pll half" divider not read/written properly | Paul Cercueil |
| 2019-06-07 | clk: ingenic/jz4725b: Fix incorrect dividers for main clocks | Paul Cercueil |
| 2019-04-11 | clk: ingenic: jz4725b: Add UDC PHY clock | Paul Cercueil |
| 2018-10-16 | clk: Add Ingenic jz4725b CGU driver | Paul Cercueil |
 |
index : linux.git | |
| Unnamed repository; edit this file 'description' to name the repository. |
| summaryrefslogtreecommitdiff |