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path: root/drivers/clk/ingenic/jz4725b-cgu.c
AgeCommit message (Expand)Author
2019-06-25clk: ingenic: Handle setting the Low-Power Mode bitPaul Cercueil
2019-06-07clk: ingenic/jz4725b: Fix "pll half" divider not read/written properlyPaul Cercueil
2019-06-07clk: ingenic/jz4725b: Fix incorrect dividers for main clocksPaul Cercueil
2019-04-11clk: ingenic: jz4725b: Add UDC PHY clockPaul Cercueil
2018-10-16clk: Add Ingenic jz4725b CGU driverPaul Cercueil