Age | Commit message (Expand) | Author |
---|---|---|
2019-05-21 | treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 13 | Thomas Gleixner |
2018-05-15 | clk: hisilicon: add missing usb3 clocks for Hi3798CV200 SoC | Jianguo Sun |
2018-03-12 | clk: hi3798cv200: add emmc sample and drive clock | tianshuliang |
2018-02-27 | clk: hi3798cv200: add COMBPHY0 clock support | Jianguo Sun |
2018-02-27 | clk: hi3798cv200: fix define indentation | Shawn Guo |
2018-02-27 | clk: hi3798cv200: add support for HISTB_USB2_OTG_UTMI_CLK | Shawn Guo |
2018-02-27 | clk: hi3798cv200: correct IR clock parent | Younian Wang |
2018-02-27 | clk: hi3798cv200: fix unregister call sequence in error path | Shawn Guo |
2017-11-14 | clk: hi3798cv200: correct parent mux clock for 'clk_sdio0_ciu' | Shawn Guo |
2017-06-21 | clk: hisilicon: add usb2 clocks for hi3798cv200 SoC | Jiancheng Xue |
2016-11-11 | clk: hisilicon: add CRG driver for Hi3798CV200 SoC | Jiancheng Xue |