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Age	Commit message (Expand)	Author
2021-02-09	clk: at91: Fix the declaration of the clocks	Tudor Ambarus
2020-12-19	clk: at91: clk-master: re-factor master clock	Claudiu Beznea
2020-07-24	clk: at91: clk-programmable: add mux_table option	Claudiu Beznea
2020-07-24	clk: at91: clk-peripheral: add support for changeable parent rate	Claudiu Beznea
2020-07-24	clk: at91: clk-generated: add mux_table option	Claudiu Beznea
2020-07-24	clk: at91: clk-generated: pass the id of changeable parent at registration	Claudiu Beznea
2020-05-26	clk: at91: allow setting all PMC clock parents via DT	Michał Mirosław
2020-05-26	clk: at91: allow setting PCKx parent via DT	Michał Mirosław
2020-05-26	clk: at91: optimize pmc data allocation	Michał Mirosław
2020-05-26	clk: at91: Add peripheral clock for PTC	Codrin Ciubotariu
2019-12-16	clk: at91: fix possible deadlock	Alexandre Belloni
2019-09-17	clk: at91: allow 24 Mhz clock as input for PLL	Eugen Hristev
2019-05-07	Merge branches 'clk-stm32f4', 'clk-tegra', 'clk-at91', 'clk-sifive-fu540' and...	Stephen Boyd
2019-04-25	clk: at91: Mark struct clk_range as const	Stephen Boyd
2019-04-25	clk: at91: allow configuring generated PCR layout	Alexandre Belloni
2019-04-25	clk: at91: allow configuring peripheral PCR layout	Alexandre Belloni
2019-03-18	clk: at91: fix programmable clock for sama5d2	Matthias Wieloch
2019-03-08	Merge branch 'clk-at91' into clk-next	Stephen Boyd
2019-02-20	clk: at91: fix masterck name	Alexandre Belloni
2019-01-09	clk: at91: enable AUDIOPLL as source for PCKx on SAMA5D2	Michał Mirosław
2018-10-17	clk: at91: add sama5d2 PMC driver	Alexandre Belloni