Age | Commit message (Expand) | Author |
2020-11-19 | x86/CPU/AMD: Remove amd_get_nb_id() | Yazen Ghannam |
2020-05-22 | x86/amd_nb: Add AMD family 17h model 60h PCI IDs | Alexander Monakov |
2020-03-17 | x86/amd_nb, char/amd64-agp: Use amd_nb_num() accessor | Borislav Petkov |
2020-01-16 | x86/amd_nb: Add Family 19h PCI IDs | Yazen Ghannam |
2019-09-03 | x86/amd_nb: Add PCI device IDs for family 17h, model 70h | Marcel Bocu |
2019-07-08 | Merge branch 'x86-cleanups-for-linus' of git://git.kernel.org/pub/scm/linux/k... | Linus Torvalds |
2019-06-19 | treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 477 | Thomas Gleixner |
2019-06-14 | x86/amd_nb: Make hygon_nb_misc_ids static | YueHaibing |
2018-11-07 | x86/amd_nb: Add PCI device IDs for family 17h, model 30h | Woods, Brian |
2018-11-07 | x86/amd_nb: Add support for newer PCI topologies | Woods, Brian |
2018-11-07 | hwmon/k10temp, x86/amd_nb: Consolidate shared device IDs | Woods, Brian |
2018-09-27 | x86/pci, x86/amd_nb: Add Hygon Dhyana support to PCI and northbridge | Pu Wen |
2018-09-27 | x86/amd_nb: Check vendor in AMD-only functions | Pu Wen |
2018-05-13 | x86/amd_nb: Add support for Raven Ridge CPUs | Guenter Roeck |
2018-02-15 | x86/cpu: Rename cpu_data.x86_mask to cpu_data.x86_stepping | Jia Zhang |
2017-10-22 | x86/cpu/AMD: Apply the Erratum 688 fix when the BIOS doesn't | Borislav Petkov |
2016-11-16 | x86/amd_nb: Add SMN and Indirect Data Fabric access for AMD Fam17h | Yazen Ghannam |
2016-11-16 | x86/amd_nb: Add Fam17h Data Fabric as "Northbridge" | Yazen Ghannam |
2016-11-16 | x86/amd_nb: Make all exports EXPORT_SYMBOL_GPL | Yazen Ghannam |
2016-11-16 | x86/amd_nb: Make amd_northbridges internal to amd_nb.c | Yazen Ghannam |
2016-08-01 | Merge branch 'x86-headers-for-linus' of git://git.kernel.org/pub/scm/linux/ke... | Linus Torvalds |
2016-07-14 | x86/kernel: Audit and remove any unnecessary uses of module.h | Paul Gortmaker |
2016-07-01 | x86/amd_nb: Clean up init path | Borislav Petkov |
2016-07-01 | x86/amd_nb: Fix boot crash on non-AMD systems | Borislav Petkov |
2016-03-29 | x86/cpu: Get rid of compute_unit_id | Borislav Petkov |
2015-05-06 | x86/gart: Check for GART support before accessing GART registers | Aravind Gopalakrishnan |
2014-10-20 | x86, amd_nb: Add device IDs to NB tables for F15h M60h | Aravind Gopalakrishnan |
2014-04-01 | Merge tag 'edac_for_3.15' of git://git.kernel.org/pub/scm/linux/kernel/git/bp/bp | Linus Torvalds |
2014-02-27 | amd64_edac: Add support for newer F16h models | Aravind Gopalakrishnan |
2014-01-25 | x86/AMD/NB: Fix amd_set_subcaches() parameter type | Dan Carpenter |
2013-08-12 | x86, amd_nb: Clarify F15h, model 30h GART and L3 support | Aravind Gopalakrishnan |
2013-04-30 | Merge branch 'x86-ras-for-linus' of git://git.kernel.org/pub/scm/linux/kernel... | Linus Torvalds |
2013-04-19 | amd64_edac: Add Family 16h support | Aravind Gopalakrishnan |
2013-03-11 | x86: Constify a few items | Jan Beulich |
2012-07-22 | Merge branch 'x86-mce-for-linus' of git://git.kernel.org/pub/scm/linux/kernel... | Linus Torvalds |
2012-06-07 | x86, amd_nb: Export model 0x10 and later PCI id | Borislav Petkov |
2012-06-06 | x86/debug: Add KERN_<LEVEL> to bare printks, convert printks to pr_<level> | Joe Perches |
2012-01-11 | Merge branch 'linux-next' of git://git.kernel.org/pub/scm/linux/kernel/git/jb... | Linus Torvalds |
2012-01-06 | x86/PCI: amd: factor out MMCONFIG discovery | Bjorn Helgaas |
2011-12-21 | x86: Simplify code by removing a !SMP #ifdefs from 'struct cpuinfo_x86' | Kevin Winchester |
2011-03-31 | x86, amd-nb: Rename CPU PCI id define for F4 | Borislav Petkov |
2011-03-17 | Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/bp/bp | Linus Torvalds |
2011-03-17 | PCI: Rename CPU PCI id define | Borislav Petkov |
2011-03-03 | x86, amd-nb: Misc cleanliness fixes | Borislav Petkov |
2011-02-10 | x86: Adjust section placement in AMD northbridge related code | Jan Beulich |
2011-02-07 | x86, amd: Support L3 Cache Partitioning on AMD family 0x15 CPUs | Hans Rosenfeld |
2011-01-26 | x86, amd: Extend AMD northbridge caching code to support "Link Control" devices | Hans Rosenfeld |
2011-01-26 | x86, amd: Enable L3 cache index disable on family 0x15 | Hans Rosenfeld |
2011-01-11 | x86: Use PCI method for enabling AMD extended config space before MSR method | Jan Beulich |
2010-11-18 | x86, cacheinfo: Cleanup L3 cache index disable support | Hans Rosenfeld |