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path: root/arch/x86/events/intel/lbr.c
AgeCommit message (Expand)Author
2020-02-11perf/x86/intel: Output LBR TOS information correctlyKan Liang
2020-02-11perf/core: Add new branch sample type for HW index of raw branch recordsKan Liang
2019-10-28perf/x86/intel: Implement LBR callstack context synchronizationAlexey Budankov
2019-09-03perf/x86: Make more stuff staticValdis Klētnieks
2019-04-16perf/x86/lbr: Avoid reading the LBRs when adaptive PEBS handles themAndi Kleen
2019-04-16perf/x86/intel: Support adaptive PEBS v4Kan Liang
2019-01-29x86/events: Mark expected switch-case fall-throughsGustavo A. R. Silva
2018-09-10perf/x86/intel: Add support/quirk for the MISPREDICT bit on Knights Landing CPUsJacek Tomaka
2018-06-21perf/x86/intel/lbr: Optimize context switches for the LBR call stackKan Liang
2018-06-21perf/x86/intel/lbr: Fix incomplete LBR call stackKan Liang
2018-02-15x86/cpu: Rename cpu_data.x86_mask to cpu_data.x86_steppingJia Zhang
2017-11-02License cleanup: add SPDX GPL-2.0 license identifier to files with no licenseGreg Kroah-Hartman
2017-07-30Merge branch 'perf/urgent' into perf/core, to pick up latest fixes and refres...Ingo Molnar
2017-07-21perf/x86/intel: Add proper condition to run sched_task callbacksJiri Olsa
2017-07-18perf/x86/intel: Record branch typeJin Yao
2017-06-30perf/x86/intel: Constify the 'lbr_desc[]' array and make a function staticColin Ian King
2017-04-14perf/x86: Avoid exposing wrong/stale data in intel_pmu_lbr_read_32()Peter Zijlstra
2016-10-16perf/x86/intel: Remove an inconsistent NULL checkDan Carpenter
2016-08-10perf/x86/intel: Clean up LBR state trackingPeter Zijlstra
2016-08-10perf/x86/intel: Remove redundant test from intel_pmu_lbr_add()Peter Zijlstra
2016-08-10perf/x86/intel: Eliminate dead code in intel_pmu_lbr_del()Peter Zijlstra
2016-08-10perf/x86: Ensure perf_sched_cb_{inc,dec}() is only called from pmu::{add,del}()Peter Zijlstra
2016-07-07perf/x86/intel: Fix rdlbr_to() MSR reading typoPeter Zijlstra
2016-06-27perf/x86/intel: Add {rd,wr}lbr_{to,from} wrappersPeter Zijlstra
2016-06-27perf/x86/intel: Add MSR_LAST_BRANCH_FROM_x quirk for ctx switchDavid Carrillo-Cisneros
2016-06-27perf/x86/intel: Fix trivial formatting and style bugDavid Carrillo-Cisneros
2016-06-27perf/x86/intel: Fix MSR_LAST_BRANCH_FROM_x bug when no TSXDavid Carrillo-Cisneros
2016-06-27perf/x86/intel: Print LBR support statement after validationDavid Carrillo-Cisneros
2016-04-28Merge branch 'perf/urgent' into perf/core, to resolve conflictIngo Molnar
2016-04-28perf/x86/intel: Fix incorrect lbr_sel_mask valueKan Liang
2016-04-23perf/x86/intel: Add LBR filter support for Silvermont and Airmont CPUsKan Liang
2016-04-23perf/x86/intel: Add Goldmont CPU supportKan Liang
2016-03-17Merge branch 'x86/cleanups' into x86/urgentIngo Molnar
2016-02-17perf/x86: Move perf_event.h to its new homeBorislav Petkov
2016-02-17perf/x86: Move perf_event_intel_lbr.c ........ => x86/events/intel/lbr.cBorislav Petkov
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