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Age	Commit message (Expand)	Author
2019-06-05	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 286	Thomas Gleixner
2019-04-30	RISC-V: Add RISC-V specific arch_match_cpu_phys_id	Atish Patra
2019-03-04	RISC-V: Remove NR_CPUs check during hartid search from DT	Atish Patra
2019-02-11	riscv: treat cpu devicetree nodes without status as enabled	Johan Hovold
2019-02-11	riscv: fix riscv_of_processor_hartid() comment	Johan Hovold
2019-02-11	riscv: add missing newlines to printk messages	Johan Hovold
2018-12-21	RISC-V: Fix of_node_* refcount	Atish Patra
2018-11-20	RISC-V: recognize S/U mode bits in print_isa	Patrick Stählin
2018-10-22	RISC-V: Show CPU ID and Hart ID separately in /proc/cpuinfo	Anup Patel
2018-10-22	RISC-V: Use Linux logical CPU number instead of hartid	Atish Patra
2018-10-22	RISC-V: Rename riscv_of_processor_hart to riscv_of_processor_hartid	Palmer Dabbelt
2018-10-22	RISC-V: Filter ISA and MMU values in cpuinfo	Palmer Dabbelt
2017-09-26	RISC-V: Init and Halt Code	Palmer Dabbelt